Write to external SRAM in four #WE cycles.

[AAshc]

Hello!

To MCU STM32h743 connected 16-bit SDRAM and 16-bit SRAM. Writin to SRAM uses four #WE cycles in conjunction with BLS0 and BLS1. When write 8 or 16 bits BLS# active only for one #WE cycle, when 32 bits - two cycle and four cycle for 64 bits. 

I can't find any explaration for using four #WE cycles for data less than 64 bits.

My settings for SRAM:

hsram.Instance = FMC_NORSRAM_DEVICE;
	hsram.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
	
 
	hsram.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
	
	/* SRAM device configuration */ 
	SRAM_RdTiming.AddressSetupTime = 2;
	SRAM_RdTiming.DataSetupTime = 8;
	SRAM_RdTiming.BusTurnAroundDuration = 4;
	
	SRAM_RdTiming.CLKDivision 	 = 2;	 
	SRAM_RdTiming.DataLatency 	 = 2;
	SRAM_RdTiming.AccessMode = FMC_ACCESS_MODE_A;
 
	hsram.Init.NSBank = FMC_NORSRAM_BANK1;
	hsram.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;
	hsram.Init.MemoryType = FMC_MEMORY_TYPE_SRAM;
	hsram.Init.MemoryDataWidth = SRAM_MEMORY_WIDTH;
	hsram.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE;
	hsram.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;
	hsram.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;
	hsram.Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;
	hsram.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;
	hsram.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
	hsram.Init.WriteBurst = FMC_WRITE_BURST_DISABLE;
	hsram.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ONLY;
	hsram.Init.WriteFifo = FMC_WRITE_FIFO_DISABLE;
	hsram.Init.PageSize = FMC_PAGE_SIZE_NONE;

With best regards.