Why do I get DMA1->LISR FIFO error when I use direct mode with double buffer mode

[esukh]

DMA1_Stream0->FCR = 0

DMA configured to work in double buffer direct mode.

And I get FEIF0 error interrupt flag?

[AVarg.19]

Same problem for me also ( but I don't use a double buffer).

The FEIFx bit is being set when the DMA stream is enabled(EN = 1) in the DMA_SxCR.

Interestingly, it seems to happen only with Memory to Peripheral transfer.

[waclawek.jan]

This is the expected behaviour in the 'F2/'F4/'F7 DMA, see the note in 4.3 Software sequence to enable DMA in AN4031.

In Direct mode, simply ignore this flag, i.e. don't enable DMA_SxFCR.FEIE.

JW