what's the point to debugging new ethernet PHY with STM32F107

[jeffj2]

Posted on April 28, 2010 at 09:44

what's the point to debugging new ethernet PHY with STM32F107

[Nickname13100_O]

Posted on May 17, 2011 at 13:49

This is weird. This post should be from user niko.haatainen, but forum says its from some one else. Maybe we logged in at the same moment or something but I have no idea who this other user may be.

[Nickname13100_O]

Posted on May 17, 2011 at 13:49

I'm using stm32f107 in RMII mode with phy that was originally not supported by stm32_eth -library. The modifications I needed to make were

- enable RMII mode from AFIO->MAPR -register (MII_RMII_SEL -bit = 1)

- setup i/os correctly, outputs in GPIO_Mode_AF_PP mode, inputs in GPIO_Mode_IN_FLOATING, make sure eth mac io is mapped correctly (ETH_REMAP bit in AFIO->MAPR)

- make sure the phy boots up in rmii mode (you may need to connect some pins to stm32 and make sure those are in hi on lo state when phy is reset or use pullups or pulldown on various pins, see PHY datasheet)

-consult phy datasheet and see how ETH_Init (in stm32_eth.c) needs to be modified when driver sets up the phy. Driver does soft reset, waits for link status to indicate connection, enables link autonegation and waits for negotiation to complete. Register and status bits within them vary between different phys so you need to study datasheet to see how to do the initialization.

[jeffj2]

Posted on May 17, 2011 at 13:49

Hello Martin, it's Linda:-)

although not done yet, but still thanks your suggestion.

[Andrew Neil]

Posted on May 17, 2011 at 13:49

Seems to get the right user for me!