What is the Voffset of the DAC1 on the STM32U5xx?

[_andreas]

The datasheet is a bit confusing. In my setup, the DAC1 saturates below 15mV. In addition, I'm not sure whether the ADC1 measures correctly below that voltage.

[Aime]

Hello @Andreas Köpke​ ,

Thank you for sharing your request :) .

On STM32U5 devices there is supposed to be no Voffest on the ADC1.

As indicated in the datasheet section 5.3.18 "14-bit analog-to-digital converter (ADC1) characteristics" if your VREF- is connected to VSSA and to the ground, the conversion voltage range for ADC1 is VSSA (0V) ≤ VAIN ≤ VREF+

 

Please find in attached the datasheet.

Best Regards,

A.MVE

[_andreas]

Below 15mV it's not linear anymore. That's what I get from my measurements. My setup is:

1. Generate a sine wave using DAC1 on PA4 from 0 to full scalb24_0k3_sinc4dec6g_9_16b_full(in my case 1.5V after modifying the B-U585I-IOT02A)
2. Sample it back on ADC1
3. Filter it
4. Plot the result

As you can see, it is not a perfect sine wave, it has an "indentation" when the input signal is close to 0V. In contrast, if I limit it to 15mV, I get

a nice sine curve.

[Aime]

Thank you for your response.

Can you try to observe directly the DAC1 output with an oscilloscope ?

If the issue is coming from the DAC1 you will be able to observe the same behavior.

Best Regards.

A.MVE

[_andreas]

[_andreas]

deleted, the MDF does not work correctly in that setup

[waclawek.jan]

In the gory details, you've forgotten to mention whether you use the DAC buffer or not. That buffer is known not to go rail-to-rail in the STM32.

 

JW

PS. Please don't edit your initial post except typos, or do it in conspicuous way, so that rest of the thread won't go out of context.

[_andreas]

I use the buffer, looks like the 0.2V is a rather conservative estimate.

[_andreas]

In my setup, it DAC1 on PA4 does reach rail. Difference from 1.5 is < 5mV. Only the lowest 10 values or so are saturated.