what is the maximum system clock frequency for STM32F103?

[JShan.2]

..

[Ozone]

Datasheet ?

[JShan.2]

sorry, it is my fault. Actually, what I want to ask is what's the maximum system clock frequency for STM32F103's FLASH?​ Because I found there are problems for copy FLASH data to RAM in startup duration since I use high frequency(I use RTOS), but every thing is fun if I use lower system frequency.

[Tesla DeLorean]

72 MHz from external 8 MHz HSE, or 64 MHz from internal HSI​

[JShan.2]

sorry, it is my fault. Actually, what I want to ask is what's the maximum system clock frequency for STM32F103's FLASH?​ Because I found there are problems for copy FLASH data to RAM in startup duration since I use high frequency(I use RTOS), but every thing is fun if I use lower system frequency.

[Ozone]

Still the datasheet and reference manual.

But to quote from memory, up to 25MHz the flash works without waitstate. For increasing core clock, more waitstates are required.

This was (again quoting from memory) handled in the CMSIS function SystemInit().

If Flash settings are not handled correctly, the system is unstable immedately after winding up the core clock.

[Danish1]

The datasheet and reference manual say how many wait-states you have to insert for FLASH at high frequencies (and different supply-voltages for many stm32).

Are you having problems before hitting "main" in that variables don't get initialised to their specified staring-values?

Normally your development environment would take care of setting the wait-states for a given processor frequency. Do you specify the frequency there, or do you hack the code it generates?