What is the maximum frequency that the ETR of a timer can support?

[David Martins]

Hello.

I do not find in the datasheet (for example STM32F072) information that will allow me to conclude what the maximum clock frequency the timer (for example TIM1) hardware (via ETR) can support.

Can you help me?

I have knowledge of similar experiences with PIC18 and the timer can handle frequencies up to 100MHz ...  but I do not find data in the STM32 datasheet that can substantiate this doubt.

Thank you.

[Tesla DeLorean]

Well pretty sure the listed part is not going to hack 100 MHz.

​

There is a resynchroniz​er on the input to get you into the local clock domain, I would lean towards half of that frequency.

[David Martins]

Hello Clive, thank you for your answer.

I have beem reading this (http://www.electronics-lab.com/project/100mhz-frequency-counter-with-pic16f628a-2) and if this could work with STM micro would be perfect.

Otherwise, maybe I have to try an CPLD.

[waclawek.jan]

As Clive said, the "conventional" timer's inputs are synchronous, so, the same as with CH1-CH4, also the ETR input is resynchronized to the timer's internal clock, i.e. its transitions can be faster than once in the timer's internal clock's period, in other words, maximum input frequency is half of the timer's internal clock frequency.

LPTIM in newer STM32 (such as 'L4xx) are asynchronous. Unfortunately, last time I looked, there was no data on maximum input frequency in the respective DS.

JW

[David Martins]

Thanks for the answers.

I will try to solve the problem in another way.

The application does not justify major inventions, so maybe go use a simple 74VHC4040.

Thank you!