What is the difference control between ODR and BSRRL(BSRRH)

[Carter Lee]

Posted on September 07, 2017 at 07:13

Hi 

I'm currently working with STM32F429I-disco kit.

and testing about gpio control.

the below code is working well.

But I want to know 

int main(void)

{

RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOG, ENABLE);

RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);

// GPIOG->CRL = 0x2800;

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 ;

GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;

GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;

GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;

GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;

GPIO_Init(GPIOA, &GPIO_InitStructure);

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_14;

GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;

GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;

GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;

GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;

GPIO_Init(GPIOG, &GPIO_InitStructure);

&sharpusing ODR

while (1)

{

if(GPIOA->IDR & GPIO_Pin_0)

 GPIOG->ODR =GPIO_Pin_14;

else

 GPIOG->ODR = 0x00;

}

}

&sharpusing BSRR

while (1)

{

if(GPIOA->IDR & GPIO_Pin_0)

GPIOG->BSRRL = GPIO_Pin_14;

else

GPIOG->BSRRH = 0xFFFF;

}

My question is what is the difference between 

ODR  and BSRR?

#gpio

[Zt Liu]

Posted on September 07, 2017 at 09:30

ODR is read/write register, BSRR is write only, and has no effect if you set a bit to zero.

So that an atomic bit operation is done through BSRR register.

Hope that helps you.

[Carter Lee]

Posted on September 07, 2017 at 18:30

Could you please letting me know some more example for understanding?

[Zt Liu]

Posted on September 08, 2017 at 05:41

I am not sure how to make you understand, but plz let me refer you to the following great resource:

FIGURE 6.12 from The Definitive Guide to ARM Cortex-M3 and Cortex-M4 Processors, by Yiu.

Here is a similar problem if you use ODR register. You don't need to care about the meaning of bit band for the moment.

You may try to figure out how the problem is solved if BSRR register is used.

Zt.

[Nesrine M_O]

Posted on September 07, 2017 at 09:31

Hi

dv2

,

The bit set reset register (GPIOx_BSRR) is a 32-bit register which allows the application to set and reset each individual bit in the output data register (GPIOx_ODR).

The bit set reset register has twice the size of GPIOx_ODR. To each bit in GPIOx_ODR, correspond two control bits in GPIOx_BSRR: BSRR(i) and BSRR(i+SIZE). When written to 1, bit BSRR(i) sets the corresponding ODR(i) bit. When written to 1, bit BSRR(i+SIZE) resets the ODR(i) corresponding bit.

Writing any bit to 0 in GPIOx_BSRR does not have any effect on the corresponding bit in GPIOx_ODR. If there is an attempt to both set and reset a bit in GPIOx_BSRR, the set action takes priority.

Using the GPIOx_BSRR register to change the values of individual bits in GPIOx_ODR is a “one-shot�? effect that does not lock the GPIOx_ODR bits. The GPIOx_ODR bits can always be accessed directly. The GPIOx_BSRR register provides a way of performing atomic bitwise handling.

There is no need for the software to disable interrupts when programming the GPIOx_ODR at bit level: it is possible to modify one or more bits in a single atomic AHB1 write access.

-Nesrine-