What is the detailed difference between VDD_FT and VDD?

[Yang Yang]

Hello, ST expert

​

From the picture below, it showes that 5V tolerent GPIO connect to VDD_FT through a protection diode. But what is detailed difference between VDD_FT and VDD?

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BR

Yang​

[KnarfB]

FT stands for five volts tolerance here. For FT IO pins, +5V at the input and VDD=3.3V would put the upper protection diode in pass mode and may damage the circuit. Therefore, the internal implementation for FT and non-FT pins is slightly different.

Perharps there is an explanation in the foot note (1) of your drawing, but you did not cite the source.

See AN4899 Application note "STM32 microcontroller GPIO hardware settings..." for details.

hth

KnarfB

[Yang Yang]

Hello, KnarfB

Thanks for your quick reply. For the scene VDD is not present, but the GPIO pin is drived 3.3V from external part, ​what would happen? The injection may damage the device?

I found our custom board may get this issue. The GPIO pin shows only tens of Ohm resistance to GND. And MCU can not work again.

BR

Yang

[Peter BENSCH]

Correct, applying a voltage to a GPIO without a supply voltage being applied to VDD is an impermissible condition and can lead to destruction due to the injection current.

Regards

/Peter

[Uwe Bonnes]

The way the current flow has no resistance in the Kiloohm range. It involves forward-biased diodes with a sharp rise in current with little additional applied voltage. Getting above the maximum allowed values is doomed for destruction of the device.