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MMust.5
Senior
June 15, 2022
Solved

What does data transmission with and without parity bit look like in UART?

For example, I use 8 bit data transfer type.

There are 3 types for the parity bit in total

No parity

Even parity

Odd parity

----------------------

Even parity

I'll make an assumption that Even parity looks like this:

10011100

The first 1 from the left is the parity bit.

If the parity bit is enabled in the settings, but it does not need to be set, because the number of transmitted bits is even, should it look like this?

00111100

----------------------

Odd parity

For Odd parity looks like this?

10001100

The first 1 from the left is the parity bit.

If the parity bit is enabled in the settings, but it does not need to be set, because the number of transmitted bits is odd, should it look like this?

00011100

---------------------

No parity

If No parity is enabled in the settings, is the parity bit excluded from data transmission?

At first 8 bits were transmitted, but when I turn off the parity bit, will 7 bits be transmitted?

Or will 8 bits be transmitted, but instead of a parity bit there will be zero?

If so, is one bit wasted in data transfer that is not used?

This topic has been closed for replies.
Tesla DeLorean
Tesla DeLoreanBest answer
Guru
June 15, 2022

The parity is the last bit sent, followed by the STOP bits, which provided for an intersymbol gap

In STM32 peripherals, the parity is counted as a bit, so 8E1 would be 9-Bit Including Parity

Line normally HIGH

..

START BIT (LOW)

BIT 0

BIT 1

BIT 2

BIT 3

BIT 4

BIT 5

BIT 6

BIT 7

PARITY BIT (making HIGH bit counts in total ODD or EVEN)

STOP BIT(S) (HIGH)

Line Continues Normally High, or you see the NEXT Start Bit

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14 replies

Paul1
Senior III
June 15, 2022

Not quite...

Data Length? 8bit, 7bit, 6bit...

Parity: None, Odd, Even

Stop bits: 1 or 2 (Receiver should work with either, this setting should only affect Tx, but some MCUs have trouble with 2 stop bits, i.e. some PIC32)

Notation: 9600,8N1 = 9600bps, 8 data bits, No parity, 1 stop bit

Examples:

s=Low Start Bit

S=High Stop Bit

P=Parity

B=DataBits

Len=Length of Tx (Tx=Transmit, Rx=Receive)

Set Len Example Consecutive

8N1 10 sBBBBBBBBS sBBBBBBBBSsBBBBBBBBS

8E2 12 sBBBBBBBBPSS sBBBBBBBBPSSsBBBBBBBBPSS

7N1 9 sBBBBBBBS sBBBBBBBSsBBBBBBBS

7O1 10 sBBBBBBBPS sBBBBBBBPSsBBBBBBBPS

5N1 7 sBBBBBS sBBBBBSsBBBBBS

Reference:

Paul

MMust.5
MMust.5Author
Senior
June 16, 2022

This picture contradicts what you wrote, as it seems to me.

Here the Possible Parity Bit is inserted in place of the ninth bit of the transmitted data?

In your example, the Possible Parity Bit is inserted AFTER the ninth bit of the transmitted data.

8E2sBBBBBBBBPSS

I took 8 bit mods as an example. In your example, there was no 9 bit mod.

0693W00000Ns0y6QAB.jpg

Paul1
Senior III
June 16, 2022

Sorry, but ST seems to describe UART Data/Parity different from every other MCU I've ever worked with.

Life is fun.

I'd call your Diagram 8 Data + Parity, So 8E1 or 8O1.

ST would call it 9 bits with last bit as Parity (Still 8E1 in the notation I've been exposed to, since is effectively 8 data + Parity, as parity bit isn't useable to transfer data information, Parity is part of error detection not data).

Paul

Paul1
Senior III
June 15, 2022

Note: Typically for UART it is low bit first: s01234567PS

Paul

MMust.5
MMust.5Author
Senior
June 15, 2022

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Tesla DeLorean
Tesla DeLoreanBest answer
Guru
June 15, 2022

The parity is the last bit sent, followed by the STOP bits, which provided for an intersymbol gap

In STM32 peripherals, the parity is counted as a bit, so 8E1 would be 9-Bit Including Parity

Line normally HIGH

..

START BIT (LOW)

BIT 0

BIT 1

BIT 2

BIT 3

BIT 4

BIT 5

BIT 6

BIT 7

PARITY BIT (making HIGH bit counts in total ODD or EVEN)

STOP BIT(S) (HIGH)

Line Continues Normally High, or you see the NEXT Start Bit

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MMust.5
MMust.5Author
Senior
June 16, 2022

And without the parity bit in ST it will be called 8N1? 

START BIT (LOW)

BIT 0

BIT 1

BIT 2

BIT 3

BIT 4

BIT 5

BIT 6

BIT 7

STOP BIT (HIGH)

Paul1
Senior III
June 16, 2022

Correct, 8N1

You sometimes see such notation on terminal programs (I've never seen 9E1 on a terminal program)

FYI: Lately I like Coolterm, as well as TeraTerm and IONinja. IONinja is especially useful for monitoring data when a different bit of software is doing the communications.

MMust.5
MMust.5Author
Senior
June 15, 2022

Ok. Understood. It seemed to me earlier that the parity bit is part of the 8 bits of data that are transmitted.

0693W00000Nrx1kQAB.png

Tesla DeLorean
Guru
June 15, 2022

>>..is part of the 8 bits of data that are transmitted

Well in ST's case if you set 8-bit mode and even parity, everyone else would call that 7E1

ST generates the parity bit on transmission.

On reception you need to strip it from the UART->DR / RDR with a mask, as the 16-bit register will have the parity bit present. If you cast it into an uint8_t it will obviously be lost, in the 8E1/8O1 cases, but just keep it in mind if you carry it with a 16 or 32-bit variable.

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MMust.5
MMust.5Author
Senior
June 15, 2022

Above, Paul@Port wrote:

8E2 == sBBBBBBBBPSS

8 bit mode BBBBBBBB

Even parity mode.

You write that with eight bits and Even parity mode, this is 7E1