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Associate
Mar 12, 2025 5:30 PM UTC
Solved

VREF+ on the STM32H743VIT6

Hello,

This is the first time I'm working with an STM32 and I have a question regarding the VREF+ pin. I'm creating a schematic for the MCU and I'm not entirely sure what to do with the VREF+ pin and I'd like some clarification on something. According to the datasheet, the connection between VDDA and VREF+ depends on the package type. I'll be using the 100-LQFP package and if I've read the datasheet correctly, that means that VDDA and VREF+ are internally connected? So I can just leave the VREF+ pin floating and still have access to VREF? Or would it still be best to apply a filtered voltage to the VREF+ pin externally? I have a filtered voltage supply to the VDDA pin already in the schematic and am I right in saying that if I have read the datasheet correctly, then there is no need to add another filtered voltage externally to VREF+, correct? Thanks.

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STOne-32
STOne-32Best answer
ST Technical Moderator
Mar 12, 2025 9:15 PM UTC

Dear @felron124 ,

 

The shared schematics sounds good with enough filtering versus Digital VDD. VDDA and VREF+ connected to same isolated +3,3VA which is a minimum to have standard ADC accuracy and performance.  if ADC is not required VDD/VDDA/VREF+ can be the same rail as well.

Ciao

STOne-32.

7 replies

Senior III
Mar 12, 2025 6:14 PM UTC

Even though it is internally connected to VDDA, it's not recommended to leave VREF+ floating. You should connect it to VDDA externally with a decoupling capacitor (typically 1µF + 100nF to VSSA) for stability.

felron124Author
Associate
Mar 12, 2025 8:11 PM UTC

Ok, so something like the following?

Side note: does the VDDA and VREF+ always have to be supplied with a stable 3.3v or would the 3.3v input on the VDD pins suffice for applications where the ADC isn't important? Thanks.

VREF+ and VDDA:

felron124_0-1741809966135.png

VDDA filter circutry:

felron124_3-1741810191090.png

VSSA:

felron124_2-1741810075821.png

 

STOne-32
ST Technical Moderator
Mar 12, 2025 6:24 PM UTC

Dear @felron124 ,

 

Welcome in STCommunity, as you have Package 100, I highly recommend to read this application note that explains the package effect on performance/ resolution: https://www.st.com/resource/en/application_note/dm00628458-getting-started-with-the-stm32h7-series-mcu-16bit-adc-stmicroelectronics.pdf

Chapter 3 is key and then next chapters .

VREF+ has a direct impact on  ADC values accuracy . chapter 6.4 for recommendations.

Hope it helps you .

 

STOne-32

felron124Author
Associate
Mar 12, 2025 8:12 PM UTC

Ok, I'll make sure to read it carefully. Thank you for the help.

STOne-32
STOne-32Best answer
ST Technical Moderator
Mar 12, 2025 9:15 PM UTC

Dear @felron124 ,

 

The shared schematics sounds good with enough filtering versus Digital VDD. VDDA and VREF+ connected to same isolated +3,3VA which is a minimum to have standard ADC accuracy and performance.  if ADC is not required VDD/VDDA/VREF+ can be the same rail as well.

Ciao

STOne-32.

mƎALLEm
ST Technical Moderator
Mar 12, 2025 9:09 PM UTC

Hello


@felron124 wrote:

Hello,

I'll be using the 100-LQFP package and if I've read the datasheet correctly, that means that VDDA and VREF+ are internally connected? 


According to the datasheet Vref+ is available on the LQFP100 package:

 

mALLEm_3-1741813766884.png

 

For the hardware design need to refer to the hardware getting started related to the product. In your case: the AN4938:

This is STM32H753XI reference schematic in the AN4938:

mALLEm_1-1741813483265.png

 

 

 

 

 

 

To give better visibility on the answered topics, please click "Best answer" on the reply which solved your issue or answered your question.
felron124Author
Associate
Mar 12, 2025 9:22 PM UTC

Ah, that document will be very useful. Thank you.