Using SRAM2 ram-code, why can't I erase page 0 since I can erase page 64?
Context: Using STM3Cube. STM2L431CC. (256KB flash, single bank)
I have RAM code that successfully erase and program page 64 to 72.
The same ram-code is then used to program page 0..8.
The problem it fails to erase any page in range 0..63.
No interrupts are enabled. When the START bit is set it is cleared right away and the page isn't erased. Cache and pre-fetch are disabled, interrupts to. No apparent mechanism is enabled to protect page 0..64. The device isn't suppose to support dual-bank.
The IDE shows undocumented bits in OPTR BFB2=1 and DUALBANK=1 .
nBOOT1=1. Of course the SR.LOCK bit is 0 for unlocked.
So what is the problem here?
I can erase and program page 64 and up and can't on 0 and my code runs in RAM?
