Using CCM (or other ram) to store critical functions

[marbel]

Posted on October 23, 2012 at 13:50

Hi.

I am using a STM32F4discoveryboard to prototype an application. In the application, I have some really critical interrupt that must be handled (or else there will be an uncontrolled surge of over 800W through the PCB). The code works, but there is always room for improvement. One of the things I want to improve is to load critical functions and interrupts into SRAM or even CCMRAM. The only thing I am using CCMRAM for right now is the task control blocks of my RTOS. I have unfortunately not been able to do this. I am by the way using Atollic 3.2 My first approach was:

void
TIM4_IRQHandler(
void
) __attribute((section(
''.data''
)));
void
TIM4_IRQHandler(
void
) {
...
}

To put the code in SRAM. It appears to work, but there is no speed increase. If I changed .data into .ccmram, it will just hardfault. I must admit that I am a bit suprised that there is no example project for this. It seems like such a great feature that appear to be used by very few considering the searchresult on this forum and on google. Is there someone sitting on an example of having certain functions and ISRs in CCMRAM or SRAM? Best regards Martin

[marbel]

Posted on October 23, 2012 at 16:59

Following this thread

http://ez.analog.com/thread/10607

I added the following and got it to work in SRAM

#define RAMFUNC __attribute__ ((long_call, section (''.ramfunctions'')))
RAMFUNC 
void
TIM1_CC_IRQHandler(
void
) {
...
}

And adding .ramfuncs in the link file

/* Initialized data sections goes into RAM, load LMA copy after code */
.data : 
{
. = ALIGN(4);
_sdata = .; 
/* create a global symbol at data start */
*(.data) 
/* .data sections */
*(.data*) 
/* .data* sections */
. = ALIGN(4);
*(.ramfunctions)
_edata = .; 
/* define a global symbol at data end */
} >RAM AT> FLASH

The weirdest thing is that this did not reduce the time spent in the interrupt. It actually increased it slightly. I guess it all depends on the load of the buses and thus on my application code inside the interrupt. It still would be interesting to see how this could work in the CCM // Martin

[Tesla DeLorean]

Posted on October 23, 2012 at 17:54

The Flash cache (ART) is very efficient at hiding the latency of the flash memory, and providing data very quickly. Running code from RAM is however more predictable. As would putting the vector table, or stacks.

I'm seeing the CCM Hard Fault on code execution, perhaps we're missing a configuration bit. I seem to recall that the CCM is attached to the data bus, with an implied 1 cycle penalty to get to the instruction bus.

The CCM will also not be contended by DMA traffic.

[GHITH.Abdelhamid]

Posted on October 23, 2012 at 18:44

on F4, CCM is only on D-bus, code can't be executed from this memory. When you are running the code from SRAM the code is more predictable. but you are in von newmann configuration where the bus is shared between code and data fetches.

[marbel]

Posted on October 23, 2012 at 19:39

The Flash cache (ART) is very efficient at hiding the latency of theflash memory, and providing data very quickly. Running code from RAM ishowever more predictable. 

Ok, that explains most of it. Still abit weird that flash will be faster on average on flash. The predicabillity is definently improved as the loadjitter is clearly visible when running from FLASH.

I'm seeing the CCM Hard Fault on code execution, perhaps we're missing aconfiguration bit. I seem to recall that the CCM is attached to thedata bus, with an implied 1 cycle penalty to get to the instruction bus.

The CCM will also not be contended by DMA traffic.

As application system is under quite ha heavy DMA transfer load, this was one of the main reasons for using the CCM.

// Martin 

[marbel]

Posted on October 23, 2012 at 19:54

on F4, CCM is only on D-bus, code can't be executed from this memory. When you are running the code from SRAM the code is more predictable. but you are in von newmann configuration where the bus is shared between code and data fetches.

You are correct.

According to the ref-manual, CCM memory is not corrected to the i-bus.

Thanks! I can beleive I missed that.

// Martin

[lowpowermcu]

Posted on October 25, 2012 at 10:31

Hi Limestone,

On F3, CCM is connected to both I-Bus and D-Bus.