Use of ADC with DMA

[Garm]

Dear community,

In a project the microcontroller STM32G4 is used, where three ADCss with DMA are used. On each ADC three channels are configured with 2.5 cycle sampling. The ADCs are triggered with a timer with a frequency of 125kHz.

The processed data from ADCs are controlled by DAC. The DACs are updated with 15kHz.

When debugging, the program is not stopped at the breakpoints once the ADCs are running, although the DACs are still running.

Next, the sampling frequency was lowered to 90kHz, at which debugging also runs.

My guess is that the data transfer via DMA is too fast that the interrupt of Debugging does not handle anymore.

Slow sampling below 100kHz is unfortunately not a solution for this project. Does anyone have another solution?

Thanks a lot.

[TDK]

I would guess the code is stuck processing interrupt handlers and doesn't actually hit the breakpoint because of it. Hardware breakpoints are not going to be affected by sampling frequency or DMA activity.

[Garm]

Thanks for your Response.

My assumption was that the DMA interrupts are triggered more

often due to the higher sampling frequency, so that the debugging monitor

interrupt cannot be handled in the meantime.

I therefore changed the prioritization of the interrupts and

assigned a higher priority to the debugging monitor. This still did not work.

If I manually pause the program flow, the program ends up at DMA

interrupt handler and I can continue debugging line by line. 

[TDK]

The cpu can only run so much code at once. If another interrupt is triggered before the first one exits, the code will be stuck in interrupt handlers forever. You'll need to disable interrupts you don't care about, or use a lower frequency, or optimize the code, or use a scheme which causes fewer interrupts. A larger DMA buffer would cause comparatively fewer interrupts.