It used to have to do with process technologies, and specific requirements of the pin-drivers to create a compilant bus at 480 Mbps
In a general purpose MCU there's the weight of supporting this vs the utility of it for everyone else who isn't
The F723 has a HS PHY built in, and thus it's choice for the ST-LINK/V3.
This obviously pushes part choices and compromises back into your court, and how you might chose to partition your design.
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