Unable to get ADC INTERRUPT

[pavan2]

Posted on January 29, 2009 at 03:20

Unable to get ADC INTERRUPT

[jgalea]

Posted on May 17, 2011 at 13:01

Hello M3allem. Thanks once again. For me it was an important point of the ADC max speed, as I did not know it. However, interrupt still did not occur. I do not wish to take further your time. Please, as a last help can you check that I configured channel A correctly?. Many thanks Johann

//declaration of variable for GPIO setup

GPIO_InitTypeDef GPIO_InitStructure;

///////////////PORT A//////////////////////////////////////

GPIO_InitStructure.GPIO_Speed = GPIO_Speed_10MHz;

GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;

//LEDs (digital)

GPIO_InitStructure.GPIO_Pin = (GPIO_Pin_11 | GPIO_Pin_12);

//Low Voltage Mode On (digital)

GPIO_InitStructure.GPIO_Pin |= GPIO_Pin_8;

GPIO_Init(GPIOA, &GPIO_InitStructure);

//ANALOGUE Inputs

GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN;

GPIO_InitStructure.GPIO_Pin = (GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |

GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7);

GPIO_Init(GPIOA, &GPIO_InitStructure);

[m3allem]

Posted on May 17, 2011 at 13:01

Hi jgalea;

The ADC clock has to not excced 14MHz, so in your code the ADC clock works at 18MHz:

/* PCLK2 = HCLK */ //hspeed bus 36MHz

RCC_PCLK2Config(RCC_HCLK_Div1);

/*ADCCLK = PCLK2/6 = 36/2 = 18MHz*/

RCC_ADCCLKConfig(RCC_PCLK2_Div2);

So I think you have to replace RCC_PCLK2_Div2 by RCC_PCLK2_Div4 -> ADC clock = 36/4 = 9Mhz

M3allem

[jgalea]

Posted on May 17, 2011 at 13:01

Hekllo M3allem, Thanks once again. Please, if you have time can you check that I declared the clock well, because Im thinking that I have a setting not right. This is my code if you have time. Thanks,

void InitClk (void) //pg 262

{

RCC_DeInit(); //resets RCC clock configuration to reset state.

/* Enable HSE */ //External High Speed oscillator

RCC_HSEConfig(RCC_HSE_ON);

/* Wait till HSE is ready */

HSEStartUpStatus = RCC_WaitForHSEStartUp();

if(HSEStartUpStatus == SUCCESS)

{

RCC_HCLKConfig(RCC_SYSCLK_Div1); //AHB clock = SYSCLK

//AHB is Advanced High-performance Bus, bus protocol.

/*Flash 2 wait state */

FLASH_SetLatency(FLASH_Latency_2);

/* Enable Prefetch Buffer */

FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);

//PLLCLK = 8MHz / 2 = 4MHz * 9 = 36 MHz

RCC_PLLConfig(RCC_PLLSource_HSE_Div2, RCC_PLLMul_9);

//sets buses depending on internal clock limit is 36MHz, RM0008 pg 34

/* PCLK2 = HCLK */ //hspeed bus 36MHz

RCC_PCLK2Config(RCC_HCLK_Div1);

/* PCLK1 = HCLK *///lspeed bus 36Mhz limit is 36MHz

RCC_PCLK1Config(RCC_HCLK_Div1);

/*ADCCLK = PCLK2/6 */

RCC_ADCCLKConfig(RCC_PCLK2_Div2);

/* Enable PLL */

RCC_PLLCmd(ENABLE);

/*Wait till PLL is ready */

while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)

{};

/* Select PLL as system clock source */

RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);

/* Wait till PLL is used as system clock source */

while(RCC_GetSYSCLKSource() != 0x08)

{};

}

/* Enable DMA clock */ //DMA2 available on high density devices only

RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);

//RCC_AHBPeriphClockCmd(RCC_AHBPeriph_SRAM, ENABLE);

/* ADC1 & 2 Periph clock enable */

RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);

/* TIM1 Periph clock enable */

RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);

/* Enable GPIOA, GPIOB, GPIOC, GPIOD, GPIOE and AFIO clocks */

RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB , ENABLE);

/* Enable USART1 clocks */

RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);

// Enable SPI1

RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1,ENABLE);

/* TIM2 clock enable */

RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);

// Enable SPI2

RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2,ENABLE);

/* ADC1 & 2 Periph clock enable */

RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);

}

[jgalea]

Posted on May 17, 2011 at 13:01

Hello M3allem, Thanks a lot for your interest and for sending me the code. I will downloaded and go through it. I will notify you about my progress. Many thanks and have a nice day. Thanks Johann

[m3allem]

Posted on May 17, 2011 at 13:01

your GPIO configuration is correct.

I attach my source code, hope that will be helpful!

M3allem

[jgalea]

Posted on May 17, 2011 at 13:01

Good morning M3allem. My problem is about the base address DMA_PeripheralBaseAddr. With ((u32)0x40012444C), was entering DMA2 and not DMA1. Im using the STM32F101x4 processor. DMA1 was being addressed after using (u32)ADC1_BASE as address. I will investigate some more and I will place all my code on the forum once ready. My problem is that it is not pointing to the address of the ADC result. I will keep you updated. Thanks Johann.