Unable to find vague reference to other technical documentation.

[estie]

Posted on July 22, 2016 at 14:19

Hi,

I am trying to sort out an interrupt problem on an STM32F4 board.

I have RM0090 Reference manual which is rather cursory on the subject and refers me to another document:

 

 

 

All interrupts including the core exceptions are managed by the NVIC. For more information

 

on exceptions and NVIC programming see Chapter 5: Exceptions & Chapter 8: Nested

 

Vectored Interrupt Controller in the ARM CortexTM-M4F Technical Reference Manual.

 

There seem to be a multitude of documents with similar titles with notably different content and so far I have not been able to find anything with relevant chapters indicated in this note.

Where can I find this document?

Thanks.

 

[Tesla DeLorean]

Posted on July 22, 2016 at 14:57

Likely from an older and restricted document, basically the ARM TRM

The Cortex-M3 TRM has similar Chaptering, and frankly content in this regard.

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0337e/CIHDIIFH.html

The current M4 one in PDF here

http://infocenter.arm.com/help/topic/com.arm.doc.100166_0001_00_en/arm_cortexm4_processor_trm_100166_0001_00_en.pdf

ST has a version of these in it's Programming Manual (PM) series.

You might be better describing the actual problem, there are a number of hazards related to interrupt exiting and clearing.

[slimen]

Posted on July 22, 2016 at 15:08

Hi,

You can have a look to this 

http://www.st.com/content/ccc/resource/technical/document/programming_manual/6c/3a/cb/e7/e4/ea/44/9b/DM00046982.pdf/files/DM00046982.pdf/jcr:content/translations/en.DM00046982.pdf

 from ST web, in section 4.3 Nested vectored interrupt controller (NVIC)

Regards