UART non-blocking vs blocking error flags and data register behaviour
I am currently implementing a UART communication on a STM32F1. As I understand from the manual, the ORE bit does block all further Rx until it is cleared but the other error flags (PE, NE, FE) do not block Rx when set.
How is the behaviour of the UART error flags and the data register (DR) in the following 2 scenarios. (in both scenarios 2 bytes are received before checking the SR and DR).
Scenario 1:
** First byte contains an PE/NE/FE error
** Second byte contains a correct byte
If I understood the manual correctly, all error flags (PE,NE,FE,ORE) are now set and DR contains the first (corrupt) byte. Is that correct?
Scenario 2:
** First byte contains a correct byte
** Second byte contains a PE/NE/FE error
My assumption is that the first byte is stored in DR but PE/NE/FE flags are set (because of the second, corrupt byte) and also the ORE. Is that correct?
If both of my assumptions are correct, is it therefore true, that, if 2 bytes are received and all error flags are set, you cannot decide whether the byte in DR is the corrupt one or the correct one?
Thank you,
Markus