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smhhadima
Associate III
January 16, 2016
Question

Two DMA captures For one timer

  • January 16, 2016
  • 6 replies
  • 1298 views
Posted on January 16, 2016 at 20:39

I have a timer (Timer1) free running.

I have assigned two input captures.

when I run this code:

 HAL_TIM_IC_Start_DMA(&htim1,TIM_CHANNEL_1,&buffer1,20);

 HAL_TIM_IC_Start_DMA(&htim1,TIM_CHANNEL_2,&buffer2,20);

only ''buffer1'' gets updated and ''buffer2'' remains all zeros

if I changed the order of the two lines only ''buffer2'' gets updated.

does it mean I cannot assign two DMA for the same counter?
    This topic has been closed for replies.

    6 replies

    Tesla DeLorean
    Guru
    January 16, 2016
    Posted on January 16, 2016 at 22:01

    You'd need to review the Reference Manual for the specific chip in question, but my understanding of the functionality is that you should be able to use two different DMA.

    I suspect this is a software limitation, it would take some time/resources to prove that.

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    smhhadima
    smhhadimaAuthor
    Associate III
    January 17, 2016
    Posted on January 17, 2016 at 07:20

    I am using STM32f407 on Discovery board.

    I have checked the HAL driver, it seems like it supports/configures the different DMA interrupts/requests for different channels!

    but the still it does not work!

    waclawek.jan
    Super User
    January 17, 2016
    Posted on January 17, 2016 at 20:50

    What is the content of TIM1_DIER in those two cases?

    One step back: to which channel/stream did you set the two DMAs?

    JW

    smhhadima
    smhhadimaAuthor
    Associate III
    January 18, 2016
    Posted on January 18, 2016 at 20:08

    I am using TIMER1

     channel 1 (DMA2 stream 1)

    and

     channel 2 DMA2 stream 2)

    Tesla DeLorean
    Guru
    January 18, 2016
    Posted on January 18, 2016 at 20:42

    I am using TIMER1 channel 1 (DMA2 stream 1) and channel 2 DMA2 stream 2)

    TIM1_CH1 -> DMA2 Stream 1 Channel 6

    TIM1_CH2 -> DMA2 Stream 2 Channel 6

    0690X00000605KeQAI.png

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    waclawek.jan
    Super User
    January 18, 2016
    Posted on January 18, 2016 at 22:41

    Well, post the content of relevant registers of TIM1 (DIER, CCMR1, CCER) and DMA registers (registers of those two streams, plus the status register), then.

    JW