Toggle Mode of Advanced Timers

[Amir1]

Dear All

I am playing with TIM 1 to better understand its functionalities. My tests indicate that in the toggle mode (set through OCxM bits of CCMR):

1) The counter operates in the up-down mode, even if the CMS bits of CR1 are set to 00 (which is for edge-aligned PWM).

2) Assuming that 1 above is true, there will be two matches. But the output toggle takes place at the second match, that is when the counter is counting down. This assumes that the polarities are left at their reset defaults.

Is this consistent with your understand of the way that toggle mode functions? The datasheet is not very clear on either of these points, and they are both important when one wants to use these for phase-shifted PWM, etc.

Much appreciated

Amir

[waclawek.jan]

> 1) The counter operates in the up-down mode, even if the CMS bits of CR1 are set to 00 (which is for edge-aligned PWM).

No. What makes you think it does?

JW

[Amir1]

Here is why:

I set Ch1 for PWM (Mode 1) and Ch2 for toggle. If CCR1 = CCR2, then regardless of the value for the CCRs, the toggle of Ch2 always takes place at the falling edge of Ch1. The value CCR1 = CCR2 only changes the pulse width of CH1 (as it should) but does not change the coicidence of the edges. Also, Ch2 is always 50% duty cycle with half the frequency (again, as it should). I can shift the edge of the toggled waveform with respect to that of Ch1 if CCR1 and CCR2 are different, But the coincidence or shift of the edges does not change even when I switch the counting mode to up or down alone, that is edge-aligned.

Now, regardless of the above observation, the question is at what match will the toggle take place when centre-aligned is selected as the counting mode of the timer. The datasheet says when CNT = CCR1. But there are two such matches in each center-aligned cycle.

Amir

[waclawek.jan]

I still don't see how any of what you've said would imply that counter would not respect the CMS bits.

 > Now, regardless of the above observation, the question is at what match will the toggle take place when centre-aligned is selected as the counting mode of the timer. > The datasheet says when CNT = CCR1. But there are two such matches in each center-aligned cycle.

I'd say, it will toggle at both.

JW

[Amir1]

No, it cannot be on both. A 50% duty-cycle toggled waveform is possible only if the toggles take place at one of the two matches. Otherwise, the toggled waveform would be asymmetrical.

A.

[Amir1]

I repeated the tests, and here is the observations which, with the exception of one correction, are the same as my previous observations:

1) In up-counting mode, the toggle takes place on the only match-- that is expected and natural.

2) In the center-aligned mode, the toggle seem to take place on the match on the way up, that is, on the rising ramp (correction to my previous email).

3) Assuming that the PWM mode has not been changed (I am using Mode 1, for the sake of argument), then 1 and 2 above result in the same toggled waveform, that is one whose edges coincide with the falling edges of the PWM channel. So no problems thus far.

However, in the down-counting mode, and with the same PWM mode as before, if the toggle is to take place on the only match (which again is natural as there is only one possible match), then the toggled edges would coincide with the rising edges of the PWM pulses, but that is not what I see. Rather, the result is the same as those in scenarios 1 and 2. This is why I thought that CMS bits might have been disregarded. I wonder if any internal polarity inversion takes place in the hardware if DIR = 1.

A.