Timing analysis for Controller and QSPI NOR Flash

[srr r]

We are using STM32F767BGT6 controller and S25FL128LAGMFI010 NOR Flash .

I want to do Timing analysis between this two ic's .

Below is the formula used for calculating setup margin and hold margin.

SETUP MARGIN =CLOCK PERIOD-TCO(MAX)-TSU,

HOLD MARGIN=TCO(MIN)-TH,

In this TCO is the Clock to Output Propagation delay.

Which parameter should i take in datasheet to calculate TCO?

or suggest any other timing analysis document