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FelixD
Associate
March 2, 2022
Solved

Timer1 doesnt generate an Output while Timer3 does (STM32L552)

I am trying to use the output compare mode of TIMER1 to produce an accurate time course on the PE9 pin. For some reason I don't get an output signal on this pin. Instead, when I use TIMER3 with the same settings as TIMER1, I get an output signal on pin PC7.

What is the reason for this? What can I change to also get the output signal from TIMER1?

/**
 ******************************************************************************
 * @file : main.c
 * @brief : Main program body
 ******************************************************************************
 * @attention
 *
 * <h2><center>&copy; Copyright (c) 2022 STMicroelectronics.
 * All rights reserved.</center></h2>
 *
 * This software component is licensed by ST under BSD 3-Clause license,
 * the "License"; You may not use this file except in compliance with the
 * License. You may obtain a copy of the License at:
 * opensource.org/licenses/BSD-3-Clause
 *
 ******************************************************************************
 */
#include "main.h"
 
void SystemClock_Config(void);
static void MX_TIM1_Init(void);
static void MX_ICACHE_Init(void);
static void MX_TIM3_Init(void);
 
/**
 * @brief The application entry point.
 * @retval int
 */
int main(void)
{
 
 SystemClock_Config();
 
 MX_TIM1_Init();
 MX_ICACHE_Init();
 MX_TIM3_Init();
 
 
 LL_TIM_CC_EnableChannel(TIM1, LL_TIM_CHANNEL_CH1);
 LL_TIM_EnableCounter(TIM1);
 LL_TIM_GenerateEvent_UPDATE(TIM1);
 
 LL_TIM_CC_EnableChannel(TIM3, LL_TIM_CHANNEL_CH2);
 LL_TIM_EnableCounter(TIM3);
 LL_TIM_GenerateEvent_UPDATE(TIM3);
 
 
 while (1)
 {
 
 }
 
}
 
/**
 * @brief System Clock Configuration
 * @retval None
 */
void SystemClock_Config(void)
{
 LL_FLASH_SetLatency(LL_FLASH_LATENCY_5);
 while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_5)
 {
 }
 
 LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE0);
 LL_RCC_HSI48_Enable();
 
 /* Wait till HSI48 is ready */
 while(LL_RCC_HSI48_IsReady() != 1)
 {
 }
 
 LL_RCC_LSI_Enable();
 
 /* Wait till LSI is ready */
 while(LL_RCC_LSI_IsReady() != 1)
 {
 }
 
 LL_RCC_MSI_Enable();
 
 /* Wait till MSI is ready */
 while(LL_RCC_MSI_IsReady() != 1)
 {
 }
 
 LL_RCC_MSI_EnableRangeSelection();
 LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
 LL_RCC_MSI_SetCalibTrimming(0);
 LL_PWR_EnableBkUpAccess();
 LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 55, LL_RCC_PLLR_DIV_2);
 LL_RCC_PLL_ConfigDomain_48M(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 55, LL_RCC_PLLQ_DIV_2);
 LL_RCC_PLL_EnableDomain_48M();
 LL_RCC_PLL_EnableDomain_SYS();
 LL_RCC_PLL_Enable();
 
 /* Wait till PLL is ready */
 while(LL_RCC_PLL_IsReady() != 1)
 {
 }
 
 /* Intermediate AHB prescaler 2 when target frequency clock is higher than 80 MHz */
 LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_2);
 
 LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
 
 /* Wait till System clock is ready */
 while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
 {
 }
 
 /* Insure 1µs transition state at intermediate medium speed clock based on DWT*/
 CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
 
 DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
 DWT->CYCCNT = 0;
 while(DWT->CYCCNT < 100);
 
 LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
 LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
 LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
 LL_SetSystemCoreClock(110000000);
 
 /* Update the time base */
 if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
 {
 Error_Handler();
 }
}
 
/**
 * @brief ICACHE Initialization Function
 * @param None
 * @retval None
 */
static void MX_ICACHE_Init(void)
{
 /** Enable instruction cache in 1-way (direct mapped cache)
 */
 LL_ICACHE_SetMode(LL_ICACHE_1WAY);
 LL_ICACHE_Enable();
}
 
/**
 * @brief TIM1 Initialization Function
 * @param None
 * @retval None
 */
static void MX_TIM1_Init(void)
{
 LL_TIM_InitTypeDef TIM_InitStruct = {0};
 LL_TIM_OC_InitTypeDef TIM_OC_InitStruct = {0};
 LL_TIM_BDTR_InitTypeDef TIM_BDTRInitStruct = {0};
 
 LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
 
 /* Peripheral clock enable */
 LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM1);
 
 TIM_InitStruct.Prescaler = 10999;
 TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
 TIM_InitStruct.Autoreload = 9999;
 TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
 LL_TIM_Init(TIM1, &TIM_InitStruct);
 LL_TIM_DisableARRPreload(TIM1);
 TIM_OC_InitStruct.OCMode = LL_TIM_OCMODE_TOGGLE;
 TIM_OC_InitStruct.OCState = LL_TIM_OCSTATE_DISABLE;
 TIM_OC_InitStruct.OCNState = LL_TIM_OCSTATE_DISABLE;
 TIM_OC_InitStruct.CompareValue = 0;
 TIM_OC_InitStruct.OCPolarity = LL_TIM_OCPOLARITY_HIGH;
 LL_TIM_OC_Init(TIM1, LL_TIM_CHANNEL_CH1, &TIM_OC_InitStruct);
 LL_TIM_OC_DisableFast(TIM1, LL_TIM_CHANNEL_CH1);
 LL_TIM_SetTriggerOutput(TIM1, LL_TIM_TRGO_CC1IF);
 LL_TIM_SetTriggerOutput2(TIM1, LL_TIM_TRGO2_CC1F);
 LL_TIM_DisableMasterSlaveMode(TIM1);
 
 LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOE);
 /**TIM1 GPIO Configuration
 PE9 ------> TIM1_CH1
 */
 GPIO_InitStruct.Pin = LL_GPIO_PIN_9;
 GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
 GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
 GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
 GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
 GPIO_InitStruct.Alternate = LL_GPIO_AF_1;
 LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 
}
 
/**
 * @brief TIM3 Initialization Function
 * @param None
 * @retval None
 */
static void MX_TIM3_Init(void)
{
 LL_TIM_InitTypeDef TIM_InitStruct = {0};
 LL_TIM_OC_InitTypeDef TIM_OC_InitStruct = {0};
 
 LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
 
 /* Peripheral clock enable */
 LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM3);
 
 TIM_InitStruct.Prescaler = 10999;
 TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
 TIM_InitStruct.Autoreload = 9999;
 TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
 LL_TIM_Init(TIM3, &TIM_InitStruct);
 LL_TIM_DisableARRPreload(TIM3);
 TIM_OC_InitStruct.OCMode = LL_TIM_OCMODE_TOGGLE;
 TIM_OC_InitStruct.OCState = LL_TIM_OCSTATE_DISABLE;
 TIM_OC_InitStruct.OCNState = LL_TIM_OCSTATE_DISABLE;
 TIM_OC_InitStruct.CompareValue = 0;
 TIM_OC_InitStruct.OCPolarity = LL_TIM_OCPOLARITY_HIGH;
 LL_TIM_OC_Init(TIM3, LL_TIM_CHANNEL_CH2, &TIM_OC_InitStruct);
 LL_TIM_OC_DisableFast(TIM3, LL_TIM_CHANNEL_CH2);
 LL_TIM_SetTriggerOutput(TIM3, LL_TIM_TRGO_CC1IF);
 LL_TIM_DisableMasterSlaveMode(TIM3);
 
 LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC);
 /**TIM3 GPIO Configuration
 PC7 ------> TIM3_CH2
 */
 GPIO_InitStruct.Pin = LL_GPIO_PIN_7;
 GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
 GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
 GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
 GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
 GPIO_InitStruct.Alternate = LL_GPIO_AF_2;
 LL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 
}
 
 
/**
 * @brief This function is executed in case of error occurrence.
 * @retval None
 */
void Error_Handler(void)
{
 /* User can add his own implementation to report the HAL error return state */
 __disable_irq();
 while (1)
 {
 }
}
 
#ifdef USE_FULL_ASSERT
/**
 * @brief Reports the name of the source file and the source line number
 * where the assert_param error has occurred.
 * @param file: pointer to the source file name
 * @param line: assert_param error line source number
 * @retval None
 */
void assert_failed(uint8_t *file, uint32_t line)
{
 
}
#endif /* USE_FULL_ASSERT */
 
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

This topic has been closed for replies.
waclawek.jan
waclawek.janBest answer
Super User
March 2, 2022

TIM1 is an Advanced timer and needs TIMx_BDTR.MOE to be set.

JW

2 replies

waclawek.jan
waclawek.janBest answer
Super User
March 2, 2022

TIM1 is an Advanced timer and needs TIMx_BDTR.MOE to be set.

JW

FelixD
FelixDAuthor
Associate
March 2, 2022

Great, thank you very much! Now it's working.