Timeouts in micro seconds

[David Gany]

Posted on May 24, 2018 at 18:22

Hi All,

I'm using:

STM32H7xx

TIM4

HAL_TIM_PWM_ConfigChannel

HAL_TIM_PWM_Start_IT

HAL_TIM_PWM_Init

I'm tring to use the general timer and its channels to generate 4 sources for timeouts.

The timer is feed by a 200MHz clock and the resolution  I need is in micro seconds, so the 'Prescaler' field is set to 200.

I set the period parameter to 0xFFFF tring to get an interrupt on each channel depending on the 'Pulse' field value.

for some reason the interrupt callback 'HAL_TIM_PWM_PulseFinishedCallback' is called at the end of the period and not at the end of the pulse meaning after 65m seconds.

Does anyone have an idea what I'm doing wrong or suggest me a different method to achieve my goal with this timer and its channels?

Thanks,

David

[T J]

Posted on May 25, 2018 at 22:45

I use 4 channels;

I don't expect you to use this code, but lift concepts...

I use a foreground process to check all the state machines.

this wait utility, just runs that process while it is waiting.

void init_mS_Wait_Timer(void) {
 // load the current timer value, save it to the CC register.
 // this will interrupt in 1mS
 HAL_TIMEx_OCN_Start(&htim2, TIM_CHANNEL_1); // no interrupt call back is initialised on TOC channel 
}
void wait(float Seconds) {
 if (Seconds < .001) // 1mSeconds
 wait_us((int)(Seconds * 1000000));
 else
 wait_ms((int)(Seconds * 1000));
}
void wait_us(int uS) {
 // tuned to 48MHz processor
 // 48MHz tuned ok.
// wait around a bit
int i, j = 0; // rubbish to force compilation
while(--uS > 0) {
 for (i = 0; i < 9; i++) ;
 if (i > 7) j = 6; // rubbish to force compilation
 }
}
void wait_ms(int _mS) {
 resetTim2ChannelCounter(&htim2, 1);
 do {
 waitTim2ChannelComplete(&htim2, 1);
 } while (--_mS > 0);
}

void waitTim2ChannelComplete(TIM_HandleTypeDef *htim, uint32_t channel) {
 uint32_t tmp;
 tmp = 0;
 while (!tmp) {
 checkBackgroundServices();
 switch (channel) {
 case 1: 
 tmp = htim->Instance->SR & TIM_SR_CC1IF;
 break;
 case 2:
 tmp = htim->Instance->SR & TIM_SR_CC2IF;
 break;
 case 3:
 tmp = htim->Instance->SR & TIM_SR_CC3IF;
 break;
 case 4:
 tmp = htim->Instance->SR & TIM_SR_CC4IF;
 break;
 } 
 }
 switch (channel) {
 // used to have &=
case 1 : {
 htim->Instance->SR = !TIM_SR_CC1IF; // clear the flag
 break;
 }
 case 2: {
 htim->Instance->SR = !TIM_SR_CC2IF; // clear the flag
 break;
 }
 case 3: {
 htim->Instance->SR = !TIM_SR_CC3IF; // clear the flag
 break;
 }
 case 4: {
 htim->Instance->SR = !TIM_SR_CC4IF; // clear the flag
 break;
 }
 }
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[henry.dick]

Posted on May 27, 2018 at 14:06

'

Does anyone have an idea what I'm doing wrong'

The chip is doing precisely what you set it up to do. If you want it to do something else, you will need to set it up accordingly.

'or suggest me a different method to achieve my goal with this timer and its channels?'

You never said what you wanted to do with regards to your ask. So tough to help you. In general setting up pwm frequency is quite simple.

[Tesla DeLorean]

Posted on May 27, 2018 at 16:13

>>

You never said what you wanted to do with regards to your ask.

Four phased/sequenced timeout interrupts tied to the phase-angle of the TIM ticking at 1us

[David Gany]

Posted on June 13, 2018 at 12:43

Thanks to all who replied.

I managed to achieve what I needed.

[henry.dick]

Posted on June 13, 2018 at 12:59

By providing no details on how you solved the problem, the next person trying to do the same or the community at large cannot benefit from your learning experience. 

If everyone in a community does this, the community dies.

[David Gany]

Posted on June 13, 2018 at 15:04

You are correct and that is not my intention.

I should have specified that instead of using 4 channels of one timer for generating micro hundreds of micro seconds timeouts I decided to use 4 Low Power Timers.

Even-thou I was able to get an interrupt callback at the end of the 

'Pulse' by setting the match register value to the current timers count plus the pulse width, the fact that I had several threads accessing the same HAL to do this configuration, caused my system to fail at hal_lock and different thread priority.

This problem is solvable, but I had preferred not messing with it, as I had all the LPTIMERs available.