Question
TIM2 update event INT Generation
Posted on January 16, 2013 at 17:18
Ok, I'm trying to get a consistent 100 msec interrupt out of Timer2 to drive an external device in steps (but not using PWM). According to the manual, I have the regs set right
: ARR, prescaler, all loaded properly and the URS bit set in CR1 to make sure I only see update events. I'm upcounting, as well.Now, in theory I should only get my handler called when there's an overflow.. but what I'm seeing is that the instant I leave my ISR there's another INT pending! Now, I clear the update event bit on entry to the ISR so I see it go away, yet it comes back instantly.. no 100 msec wait.I'm sure my timebcase is correct and my oscillator (OC1) is set right, if I disable the update event INT I see the counter count up/reload properly...Is there anything I should be particularly aware of when setting TIM2 to do this kind of thing? I'm a bit puzzled at this stage, all pointers/manual pages/etc. appreciated. #stm32 #timer