TIM_OCMODE_ACTIVE output problem ?

[Jerry Yung]

I config timer'mode is TIM_OCMODE_ACTIVE  , start enable ,can output waveform,but enable more than one time , only output the first corresponding waveform .

why behavier so ?

but when I config timer TIM_OCMODE_PWM2( or TIM_OCMODE_PWM1 ),enable and disable more than one times , corresponding waveform all output .

[waclawek.jan]

You appear to be using some kind of a "library", SPL or Cube. Library functions are designed for some particular purpose, e.g. running one channel of PWM; but the documentation may not be very clear of this. If you then try to use such funcions for some different purpose, the result may be surprising.

JW

[Bob S]

What waveform are you trying to generate? TIM_OCMODE_ACTIVE will set the output pin "active" on the compare, and that is it. You get one transition on the output until you reconfigure the timer to do something else. And if you are trying to do a series of output compares, you will need to manually drive the output pin "inactive" between the compares (or change the mode to TIM_OCMODE_INACTIVE for the next compare).

[Jerry Yung]

yes, I have tried , it seems works .

but why must do that, is relate to OCxREF level ? this make much puzzled .

and another question , you can look for my first post, about config deadtime.

[Bob S]

Why must you do WHAT? Change the output compare modes from ACTIVE to INACTIVE in each interrupt? Because that is how those two modes work. If you can describe the waveform you are trying to generate, maybe we can provide more help. Or if one of the PWM modes works, just use that., PWM is designed for generating repetitive waveforms. ACTIVE/INACTIVE are for irregular waveforms.

As for debugging deadtime - I've never dealt with that. But I suggest following the suggestions already posted in that thread.

[waclawek.jan]

This can be achieved by dynamically changing content of TIMx_CCER between stages.

For disabling any of the complementary channels, e.g. as for CH1 in phase 2 (first stage), you simply clear the respective TIMx_CCER.CCxE/CCxNE; enable that channel by setting the respective CCxE/CCxNE bit. The disabled channel can be left floating (possibly pulled to the required state by setting a pulldown/pullup in the respective GPIOx_PUPDR), or set to the inactive level, depending on TIMx_BDTR.OSSI. Note, that when both channels are disabled, OSSI won't apply, they both are floating.

You may want to switch on preloading of those bits by setting TIMx_CR2.CCPC.

You may need to swap CHx/CHxN, as the deadtime shortens the CHxN channel.

I'd recommend to give up on doing this in Cube/HAL and resort to register-level programming. In any case, read thoroughly the timer chapter in reference manual.

JW