It appears that, because it’s a ‘core’ function, it is described within PM0056 (15491 Rev 3), rather than RM0008.
Its priority is set by the PRI_15 field within SCB_SHPR3 (System Control Block, System Handler Priority Register) – see PM0056 p139.
It would seem that altering the Group setting would affect it (and all other ‘system’ priorities), although I can’t find an explicit reference to this.
It defaults to 0x00 (highest possible priority), although a catch is that core_cm3.h: SysTick_Config() overrides it to 0x0F (read back as 0xF0), but without explaining why!
You can easily override it back by calling NVIC_SetPriority(), but I’m nervous about this – why did ARM think that it needed to be overriden to the lowest priority (or is this a bug…)?
So I understand that I should set the SysTick priority according to my intention after SysTick_Config(), NVIC_PriorityGroupConfig() and NVIC_Init() for HW interrupt sources have been called. As I use several HW interrupts with different interrupt periods and different time consumption of handlers I must draft a time budget initially.
Internally SysTick is number 15 within the core, and that is higher than all the IRQ's generated by the peripherals.
You need to tell NVIC how to order them (priority/preemption) to fit *your* application and usage. That's why they are programmable. Seeing as a lot of people slap a ridiculous amount of processing in the SysTick interrupts, it usually make sense to give it a lower priority, so that quick routines servicing hardware efficiently can get their job done and leave. If you are simply incrementing a counter with the SysTick interrupt, and leaving immediately, and want low latency, give it a high priority. If you have a 1 ms SysTick, and your ''tasks'' are sucking 500 us then give it a low priority.
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