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DanF
Associate II
May 5, 2022
Question

Sync DMA request every 72 bytes based on GPIO signal

  • May 5, 2022
  • 4 replies
  • 1283 views

I have an SPI peripheral that generates an external signal (EXTI) when a data record is ready. The data is then read over SPI by the MCU. The data record is 72 bytes.

Right now I have an interrupt handler that starts the DMA process to read the next record upon EXTI.

I'd like to use DMA synchronization on the external signal. The EXTI is only generated once every 72 bytes. I'd like to know if there is a way to have the DMA process automatically transfer 500 records (each of 72 bytes) without the processor involved but still synchronized to the EXTI signal so data isn't read before it's ready.

I was hoping to do this with the DMA synchronization approach but it transfers 8 bytes and then waits for the next EXTI signal.

Let me know if anyone has a thought on how to do this.

Thanks for your help!

Dan

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4 replies

Tesla DeLorean
Guru
May 5, 2022

These MCU aren't really designed with this sort of specificity/flexibility. Got weird and specific stuff, bolt a CPLD to the F(S)MC, and implement a peripheral.

Perhaps you can use some TIM based trigger, with an advanced timer (TIM1,TIM8) which have an 8-bit repetition count?

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DanF
DanFAuthor
Associate II
May 5, 2022

Thanks for your answer, I appreciate it! I was hoping I missed some simple solution, but it sounds like there isn't one.

waclawek.jan
Super User
May 5, 2022

Which STM32?

Which SPI? Is SPI master? Is it duplex? Can it be set to halfword or word data length?

Have you read the DMAMUX chapter in RM?

JW

DanF
DanFAuthor
Associate II
May 5, 2022
It is stm32h7 spi4. The stm32 is the master and it's full duplex.
Thanks!
Dan
waclawek.jan
Super User
May 6, 2022

SPI in 'H7 support 32-bit frames, that's 4 bytes per frame, thus 72 bytes are 18 DMA transfers. So set SPI to 32-bit frames in SPI_CFG1.DSIZE, and set the respective DMA channels to transfer words.

The DMAMUX in 'H7 can be set to forward up to 32 DMA requests per sync trigger, as DMAMUX1_CxCR.NBREQ field is 5 bits wide. So set it to 18 - 1 to provide 18 transfers.

This is needed only for the SPI Tx DMA; the Rx DMA may be set straighforwardly without sync.

I don't use the H7 but I believe this should work.

JW