STM32U595 showing high current consumption in shutdown mode at low temperature

[MatthewJP]

I have the STM32U595QJI6 installed on a custom PCB sharing its VDD supply line with other components, when the PCB is to go into standby, the command HAL_PWREx_EnterSHUTDOWNMode()  is used to put the STM32U595QJI6 into shutdown mode.
The PCBs standby current is as expected, however, when the VDD supply line is at 3.3V, and the STM32U595QJI6 gets colder (locally cooling just the STM32U595QJI6 to 0℃) the standby current starts to increase roughly 3 times higher.

When the VDD supply line is at 3V, this does not occur, and the standby current decreases as the temperature decreases as expected.
When the PCB is running, the running current also decreases when it is cooled to 0℃ as expected, regardless of if the VDD supply line is 3V or 3.3V
All the pins are in an analog state, except the PWR_PUCRx and PWR_PDCRx , which are in a default state.

What could be the cause of this current increase in shutdown mode, under the specific conditions of a 3.3V VDD supply line, and a temperature decrease to 0℃？

It has been confirmed across multiple PCBs using the same circuitry, so it is not the result of an individual PCB error.

[Stassen.C]

Hello MatthewJP,

This behavior is not expected to be inferred from the GPIO configuration alone. A threefold increase in the complete PCB standby current does not necessarily mean that the STM32 shutdown current itself has increased by the same amount, particularly because the STM32 shares its VDD rail with other devices.

The first step is therefore to determine whether the additional current is:

• drawn directly through an STM32 supply pin, or
• caused indirectly by current flowing between the STM32 and another component through an I/O or secondary supply domain.

Points to check

1. Measure the STM32 supply current separately

   If possible, isolate the MCU VDD supply using a jumper, zero-ohm resistor, or PCB trace and measure only the current entering the STM32 VDD/VDDA domains.

   Also monitor the current versus temperature and supply voltage rather than measuring only at 3.0 V and 3.3 V. A voltage sweep around the transition may reveal whether a specific internal or external threshold is involved.

2. Check all STM32 power domains

   Verify the voltage and current paths associated with:

   • VDD
   • VDDA
   • VDDUSB, if applicable
   • VBAT
   • VREF+
   • VCAP pins
   • the internal SMPS-related pins, according to the selected supply configuration

   No secondary supply should remain at a voltage significantly different from VDD unless this operating condition is explicitly permitted by the datasheet. A current path can otherwise exist through an internal protection structure or analog switch.

3. Check for current injection through pins

   Configuring GPIOs in analog mode disables the digital input buffer, but it does not guarantee that no current can flow through the pad protection circuitry.

   During shutdown, measure the voltage on every signal connected to another powered component. In particular, check:

   • communication interfaces connected to external devices
   • SWDIO and SWCLK
   • NRST
   • BOOT0
   • wake-up pins
   • oscillator pins
   • USB pins
   • analog inputs
   • any signal connected to a component powered from another rail

   Each pin voltage must remain within the permitted injection-current conditions relative to VDD and VSS. Disconnecting external peripherals or inserting series resistors can help identify such a path.

4. Explicitly configure the shutdown pin state

   The statement that the PWR_PUCRx and PWR_PDCRx registers are left at their reset values is important. GPIO configuration immediately before entering shutdown is not necessarily sufficient to define every pad state after the low-power transition.

   Configure the required pull-up or pull-down state explicitly for pins that must not float in shutdown—especially wake-up, reset, chip-select, enable, interrupt, and externally driven signals. Also verify the actual pin levels with an oscilloscope after shutdown entry.

5. Check that the MCU remains in shutdown

   A marginal wake-up or reset signal can cause repeated wake-up/reset attempts. The average current can then appear only moderately higher than shutdown current, even though the MCU is periodically active for short intervals.

   Please check:

   • wake-up flags are cleared before shutdown
   • unused wake-up sources are disabled
   • RTC alarms and wake-up timers are disabled if not required
   • NRST is stable
   • wake-up pins have defined levels
   • no watchdog or external component periodically resets or wakes the MCU

   Monitor NRST and one available diagnostic pin with an oscilloscope. A GPIO pulse placed early in startup can also reveal unexpected restarts.

1. Remove the debugger during the measurement

   Disconnect ST-LINK/J-Link completely, including SWD and reset connections. Debug low-power settings or probe-driven signals can affect both entry into shutdown and pin leakage.

Temperature-related observation

The fact that the issue:

• occurs only around 3.3 V,
• appears when the MCU is cooled,
• does not occur in run mode, and
• is reproduced on several boards,

suggests a repeatable threshold-dependent condition, but it is not sufficient to conclude that it is an intrinsic STM32 leakage characteristic. Possible explanations include:

• an externally driven pin crossing an input or protection threshold;
• a secondary supply-domain mismatch;
• a floating wake-up/reset signal changing state with temperature;
• repeated wake-up/reset activity;
• the board’s 3.3 V regulator or another component changing operating mode when the total load decreases;
• or, after these causes are excluded, a device-specific low-power behavior requiring investigation.

Please also verify the exact VDD measured directly at the MCU pins. Some 3.3 V regulators rise above their nominal output at very light load or low temperature.

Recommended diagnostic result

A useful characterization would include:

• current entering the STM32 VDD pins only;
• current entering VDDA, VBAT and VDDUSB separately;
• actual VDD voltage at the device;
• temperature and voltage at which the increase begins;
• whether the current shows steps, oscillations, or periodic pulses;
• the STM32U595 revision ID;
• the selected internal supply configuration;
• and a schematic extract showing all MCU power pins and externally connected signals.

If the increased current remains present with the STM32 supply isolated, all external signals disconnected or held within specification, the debugger removed, and shutdown entry verified, please open an ST support case with these measurements. That would allow the behavior to be checked against the exact silicon revision and characterized under controlled conditions.

 

Regards,
Stassen

[MatthewJP]

Greetings Stassen

Thank you very much for the detailed response. I will attempt to do some of the outlined measurements, although some I will not be able to perform due to requiring the PCB to be altered, as well as many GPIOs being inaccessible in the current PCB design. 

Unfortunately, I am unable to share the details of the PCB layout or the schematic due to this being a public forum. If possible, I would like share information directly with ST personnel if that is an option, as I think seeing the STM32U595QJI6 ICs interface with the external components, as well as the shared VDD rail, is necessary to finding the source of this behavior.  As you say, it is repeatable threshold-dependent condition, but there isn't enough information to conclude that it is an STM32 leakage characteristic by itself.

An additional detail I can confirm from my testing, is that when VDD is at 3.3V, the current increases incrementally as the IC cools, for example, for every 1°C　dropped, an additional current of roughly 3μA appears on the PCB overall standby current. A drop from 10°C to 0℃ will result in a roughly 30μA increase.

I will check what I can from the outlined measurements above and respond back with any additional findings.

Best Regards.

Matthew