STM32U585 CLOCK JITTER

[Ephraimoved]

Dear Sir.

I am using a board equipped with STM32U585 , The main clock is 32.768 khz

see included pic.

PA8 is configured to drive LSE 32KHZ using the command
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_HIGH);

PA8 is fed to ECG MAX30001.

On some boards MAX30001 reports pll lock problem.

The signal of  32 khz on PA8 is shown at the attached video.

Setting the parameter __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_HIGH); to
0 or RCC_BDCR_LSEDRV_0 or RCC_BDCR_LSEDRV_1 makes no change on the jitter

1. Is this jitter is normal.

Please Advise

[jiangfan]

32768Hz jitter is common and normal, while 32768Hz clock long term stability is good in general.

I suppose the "pll lock problem of MAX30001" is not directly link to 32768Hz jitter with STM32U585 or other MCU.