Skip to main content
Visitor
Nov 4, 2026 12:31 AM UTC
Question

STM32U375RETQ6 - Flash Erase succeeds but HAL_FLASH_Program causes BusFault

Hello,

 

I am using an STM32U375RETQ6 (512 KB Flash) and I am trying to erase and program the internal Flash using the STM32 HAL.

 

Environment

borad: customborad

Device: STM32U375RETQ6

STM32CubeIDE generated project(Ver2.2.0)

debugger: j-link

TrustZone disabled (TZEN = 0)

Dual Bank enabled (DUALBANK = 1)

Flash size confirmed as 512 KB (FLASHSIZE_BASE = 512)

Voltage Scaling: Range 1

Flash Latency: 3 Wait States

EPOD Booster enabled

MPU enabled, but no Flash region is configured

ICACHE disabled during Flash operations

 

Flash layout

 

Since this device has 512 KB Flash and Dual Bank is enabled:

 

Bank1: 0x08000000 - 0x0803FFFF

Bank2: 0x08040000 - 0x0807FFFF

 

Target programming address:

 

C

0x0807C000

 

which belongs to Bank2.

 

Erase operation

 

Flash erase completes successfully.

 

After erase, memory contents are correctly read back as:

 

0x0807C000 : FFFFFFFF FFFFFFFF ...

 

HAL_FLASHEx_Erase() returns HAL_OK.

 

No Flash error flags are reported.

 

Program operation

 

Programming fails inside the HAL function.

 

Call:

 

C

HAL_FLASH_Program(

FLASH_TYPEPROGRAM_DOUBLEWORD,

0x0807C000,

(uint32_t)wrbuf

);

 

The fault occurs inside:

 

C

static void FLASH_Program_DoubleWord(...)

{

SET_BIT((*reg_cr), FLASH_CR_PG);

 

*dest_addr = *src_addr; // BusFault here

}

Fault information

 

At the moment of the fault:

 

FLASH_CR = 0x40000001

FLASH_SR = 0x00000000

FLASH_SSR = 0x00000000

 

The PG bit is set and no Flash error flags are present.

 

CPU fault information:

 

 

CFSR = 0x00000082

HFSR = 0x40000000

BFAR = 0x0807C000

 

This indicates:

 

PRECISERR = 1

BFARVALID = 1

 

The BusFault occurs on the write access to address 0x0807C000.

 

Additional checks already performed

Flash unlock successful

Flash lock bit cleared

Voltage Scaling changed from Range2 to Range1

EPOD Booster enabled

Flash Latency increased to 3 WS

ICACHE disabled

Tested both FLASH_TYPEPROGRAM_DOUBLEWORD and FLASH_TYPEPROGRAM_BURST

Tested with fixed data patterns

Tested with local variables

Tested with static buffers

Tested with explicitly 8-byte aligned buffers using:

C

static uint32_t wrbuf[2] __attribute__((aligned(8)));

Confirmed that the problem is independent of the data content

Confirmed that the problem is independent of source buffer alignment

Tested both Bank1 and Bank2 target areas

MPU configuration checked

TrustZone disabled

WRP/HDP/SECWM protections checked and disabled

Flash erase succeeds correctly

FLASH_SR and FLASH_SSR remain zero even after the fault

Observation

 

The Flash erase operation works correctly, but the first Flash write access inside FLASH_Program_DoubleWord() immediately generates a BusFault before any Flash error flag is set.

 

Question

 

Why would a write to Flash generate a BusFault during the first store operation while:

 

erase succeeds,

PG bit is correctly set,

FLASH_SR and FLASH_SSR remain zero,

no protection mechanisms appear active,

and no Flash error flags are reported?

 

Is there any additional configuration or known condition required for Flash programming on STM32U375RETQ6 that could explain this behavior?

 

Thank you.

Shirley.Ye
ST Employee
Nov 4, 2026 2:39 AM UTC

CFSR = 0x00000082 means:

  • DACCVIOL (bit 1): a data access violated MPU permissions.
  • MMARVALID (bit 7): MMFAR contains the faulting address. Check SCB->MMFAR, for the address associated with this status.

The CPU’s programming store to 0x0807C000 can be rejected by the MPU before it reaches the Flash controller.