STM32L4x6 RM0351 SDMMC Anomally

[Tesla DeLorean]

Posted on May 30, 2018 at 19:12

RM0351 Rev 6 (also in Rev 5)

http://www.st.com/content/ccc/resource/technical/document/reference_manual/02/35/09/0c/4f/f7/40/03/DM00083560.pdf/files/DM00083560.pdf/jcr:content/translations/en.DM00083560.pdf

 

Describes SDMMC_STA describes bit 9 as reserved, on other parts this is STBITERR, I have a NUCLEO-L476RG (CPUID 410FC241 DEVID 415 REVID 1007) where the SDIO/SDMMC is stuck in a timeout loop, and this bit is asserted.

[Tesla DeLorean]

Posted on June 01, 2018 at 00:20

I got to the bottom of my specific issue, but this bit does fire/function, and it is described in all the stm32l4xyab.h files.

The timeout loops in the sdmmc drivers need to recognize this bit and exit immediately as it occurs at the beginning of a read transaction, before data transfer occurs, and you don't need a 30 second timeout to wait for it to get better.

My issue was a disagreement between the driver, the card, the peripheral and the wiring about who was in 4-bit mode. The function of the bit is undocumented, but consistent with other implementations.

Currently bench testing a 128GB eMMC card using a modified SDMMC driver, using DMA on a NUCLEO-L476RG - 16.6 MBps Read, 12.5 MBps Write