STM32L4R5ZI reset issue.

[Phanirajkiran M]

Posted on May 31, 2018 at 15:48

Archive addition leading to Reset.

Now its failing in SystemClock_Config.

And entering to WWDG_IRQHandler() at startup_stm32l4r5xx.s:132 0x8009dc0

Failing at 

RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};

RCC_OscInitTypeDef RCC_OscInitStruct = {0};

♯♯♯♯♯♯♯♯♯♯♯♯♯♯♯♯♯♯♯♯♯♯♯&sharpin Debug After completing the above 2 lines enter to reset♯♯♯♯♯♯♯♯♯

---->>>>>>>>>>>/* Enable voltage range 1 boost mode for frequency above 80 Mhz */

__HAL_RCC_PWR_CLK_ENABLE();

HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);

__HAL_RCC_PWR_CLK_DISABLE();

/* Enable MSI Oscillator and activate PLL with MSI as source */

RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;

RCC_OscInitStruct.MSIState = RCC_MSI_ON;

RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;

RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;

RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;

RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;

RCC_OscInitStruct.PLL.PLLM = 1;

RCC_OscInitStruct.PLL.PLLN = 60;

RCC_OscInitStruct.PLL.PLLR = 2;

RCC_OscInitStruct.PLL.PLLQ = 2;

RCC_OscInitStruct.PLL.PLLP = 7;

if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)

{

/* Initialization Error */

while(1);

}

/* To avoid undershoot due to maximum frequency, select PLL as system clock source */

/* with AHB prescaler divider 2 as first step */

RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);

RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;

RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV2;

RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;

RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

if(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)

{

/* Initialization Error */

while(1);

}

/* AHB prescaler divider at 1 as second step */

RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK;

RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;

if(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)

{

/* Initialization Error */

while(1);

}

Thanks

Phani

#systemclock_config

[Phanirajkiran M]

Posted on May 31, 2018 at 15:52

Open On-Chip Debugger 0.10.0-dev-00007-g58350bc-dirty (2018-01-12-12:21)

Licensed under GNU GPL v2

For bug reports, read

http://openocd.org/doc/doxygen/html/bugs.html

srst_only separate srst_nogate srst_open_drain connect_assert_srst

Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD

padded zone erase set to 1

adapter_nsrst_delay: 100

adapter speed: 480 kHz

Info : tcl server disabled

Info : telnet server disabled

Info : clock speed 480 kHz

Info : STLINK v2.1 JTAG v29 API v2 M18 VID 0x0483 PID 0x374B

Info : using stlink api v2

Info : Target voltage: 3.199481

Info : Stlink adapter speed set to 480 kHz

Info : STM32L4R5ZITx.cpu: hardware has 6 breakpoints, 4 watchpoints

Info : accepting 'gdb' connection on tcp/3333

Info : Stlink adapter speed set to 480 kHz

adapter speed: 480 kHz

target halted due to debug-request, current mode: Thread

xPSR: 0x01000000 pc: 0x08009eb0 msp: 0x200a0000

Info : Stlink adapter speed set to 4000 kHz

adapter speed: 4000 kHz

Info : Device id = 0x10036470

Info : STM32L4xx flash size is 2048kb, base address is 0x8000000

Info : Stlink adapter speed set to 480 kHz

adapter speed: 480 kHz

target halted due to debug-request, current mode: Thread

xPSR: 0x01000000 pc: 0x08009eb0 msp: 0x200a0000

Info : Stlink adapter speed set to 480 kHz

adapter speed: 480 kHz

target halted due to debug-request, current mode: Thread

xPSR: 0x01000000 pc: 0x08009eb0 msp: 0x200a0000

Info : Stlink adapter speed set to 4000 kHz

adapter speed: 4000 kHz

target halted due to breakpoint, current mode: Thread

xPSR: 0x61000000 pc: 0x20000050 msp: 0x200a0000

Warn : block write succeeded

Warn : keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not sent! (1110). Workaround: increase 'set remotetimeout' in GDB

Info : Stlink adapter speed set to 480 kHz

adapter speed: 480 kHz

target halted due to debug-request, current mode: Thread

xPSR: 0x01000000 pc: 0x08009eb0 msp: 0x200a0000

[Tesla DeLorean]

Posted on May 31, 2018 at 17:29

I this a NUCLEO or DISCO board?

Try clocking slower. Current settings targeting 120 MHz, which should be viable.

Implement a proper Hard Fault Handler, and consider using something a little more polished than OpenOCD

I've successfully used this on my Nucleo-L4R5ZI

void SystemClock_Config(void)

{

  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};

  RCC_OscInitTypeDef RCC_OscInitStruct = {0};

  /* Enable voltage range 1 boost mode for frequency above 80 Mhz */

  __HAL_RCC_PWR_CLK_ENABLE();

  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);

  /* Ensure that MSI is wake-up system clock */

  __HAL_RCC_WAKEUPSTOP_CLK_CONFIG(RCC_STOP_WAKEUPCLOCK_MSI);

#ifdef USE_STM32L4XX_NUCLEO_144

    /* IOSV bit MUST be set to access GPIO port G[2:15] */

  HAL_PWREx_EnableVddIO2();

#endif

  /* Enable MSI Oscillator and activate PLL with MSI as source */

  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;

  RCC_OscInitStruct.MSIState = RCC_MSI_ON;

  RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;

  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;

  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;

  RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;

  RCC_OscInitStruct.PLL.PLLM = 1;

  RCC_OscInitStruct.PLL.PLLN = 60;

  RCC_OscInitStruct.PLL.PLLR = 2;

  RCC_OscInitStruct.PLL.PLLQ = 2;

  RCC_OscInitStruct.PLL.PLLP = 7;

  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)

  {

    /* Initialization Error */

    while(1);

  }

  /* To avoid undershoot due to maximum frequency, select PLL as system clock source */

  /* with AHB prescaler divider 2 as first step */

  RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);

  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;

  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV2;

  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;

  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)

  {

    /* Initialization Error */

    while(1);

  }

  /* AHB prescaler divider at 1 as second step */

  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK;

  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)

  {

    /* Initialization Error */

    while(1);

  }

}

[Phanirajkiran M]

Posted on June 01, 2018 at 08:21

Thanks for the support.

I have taken the systemconfig from the sample code provided from L4 Software Stack bundle.

But now when i apply this code what you have provided. 

Now its clear that the stack before entering the RESET / WDT. 

It looks like this 

From GPIO its picking. 

May i post some more info after debugging.

Thanks

Phani

[Tesla DeLorean]

Posted on June 01, 2018 at 08:30

Sorry, I don't really know what to make of that.

Do you have a watchdog set up? Or is it just entering the Default_Handler dumping ground, which is where WWDG_IRQHandler also weakly binds too?

Are you enabling other interrupts? A TIM or SysTick perhaps?

[Phanirajkiran M]

Posted on June 01, 2018 at 08:39

Dear Clive,

I have no WDT set and No TIM set.

When i start debugging and try to see closely in single step from Main()

when i use RCC_OSCILLATORTYPE_MSI 

When i use HSE it enters to a RESET and not ready stage.

may be the lib is not compatible to the system when integrated.

But my doubt is irrespective of lib it has to pass the systemconfig function call. 

Thanks for support.

Thanks

Phani

[Tesla DeLorean]

Posted on June 01, 2018 at 09:07

Not having this trouble with Keil.

I'm using the 4 MHz MSI too, not sure of the HSE connectivity, I'd assume it can pull 8 MHz from the ST-LINK via HSE+BYPASS, would need to double check manual for solder bridges.

Check where the stack is situated.

Perhaps go into startup.s and start bisecting the large list of weak symbols that are at the Default_Handler address. If you're particularly keen you could make sure each one has a handler at a unique address so you can identify the source.

The most obvious one would be SysTick_Handler, check the .MAP file and linkage of that. Are you using any .CPP files? Does you project include stm32l4xx_it.c?

[Phanirajkiran M]

Posted on June 01, 2018 at 09:12

Ok ill do as suggested on debug . 

No CPP files used. And yes project include stm32l4xx_it.c

Thanks

Phani

[Phanirajkiran M]

Posted on June 01, 2018 at 11:38

Yes i have checked my CubeMx tool for UART and I2C clk is around 2 and 4 . Let me change and see how the board behaves now.

Thanks

Phani

[Phanirajkiran M]

Posted on June 01, 2018 at 13:54

Atlast i have identified why the system is getting into RESET.

Case: 1. When i use floating point ABI == hard i get the all the interface ports are working that means the HAL is OK. 

Case 2: Keeping the 

floating point ABI == hard and trying to link the library of BME680 it wont link asking for VFP register. 

This leads to change the floating point ABI from hard to soft ,i..e.., floating point ABI == soft in MCU settings. 

Make a build clean and build the whole project and the HAL and all things get build and Linking will be done. 

When flashed on to the system 

Either SystemConfig gets RESET 

or

GPIO gets RESET 

or LPUART gets RESET and in one case I2C got reset. which means the HAL compiled when keeping the floating point ABI == soft leading to MCU reset. 

So conclusion is to link the lib and getting the MCU in non resetting mode. i need to use floating point ABI == hard.

 

I need to know how to make STM32L4R5ZI to be linked to VFP register linking in keeping 

floating point ABI == hard . 

Please let me know how to fix this.

Regards

Phani