STM32L4P5 - I understand that a "load multiple registers" takes multiple clock cycles to execute. can an interrupt break in the middle of this or does it wait till after the set of loads is complete?

[JCase.1]

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[Piranha]

https://community.arm.com/support-forums/f/architectures-and-processors-forum/4489/problems-with-interrupting-ldm-stm-cortex-m4

https://stackoverflow.com/questions/52924118/interrupted-load-multiple-store-multiple-on-cortexm