STM32L431V LQFP100 problem with SPI2 - MISO

[MMa��]

STM32L431V LQFP100

SN : 54FF6B067266535348440967

Firmware : V2J27S6

I use the periphery SPI2 ( CLK enabled ), the periphery is connected PIN:

PD_1 (CLK) - config is AF_5, LowSpeed, MODE_AF_PP, NOPULL

PD_4 (MOSI) - config is AF_5, LowSpeed, MODE_AF_PP, NOPULL

PD_3 (MISO) - config is AF_5, LowSpeed, MODE_AF_PP, NOPULL

periphery config:

SPI_CR1 = 0x33D

SPI_CR2 = 0x300

and Enabled periphery

Send Messaging is OK, but receiving messages is BAD.

the correct date is PD_3 (MISO), but incorrect data is SPI_DR ( SPI_DR is always 0x0FF0 )

the same problem is wiht PIN PC_2

BUT the same setting registr and the same SW works on SPI3 correctly (PC10, PC11 and PC12).

Where is the problem on SPI2 ??

[Slh]

Why you don't use HAL Library?

[MMa��]

No, I can't use them in my project (HAL library).

[waclawek.jan]

What is the expected SPI_DR content?

Note, that using debugger to observe register content may be intrusive.

Try changing the SCK pin's drive (speed, OSPEEDR) to higher.

Try a conservative data size, e.g. 8 or 16, rather than 4, just to see if there's any significant difference.

JW

[MMa��]

changing the SCK pin's drive to higher (Mediu, High, VeryHigh ) - problem remains

changing the size date (8 or 16 bit) - the other device does not respond to given commands

[waclawek.jan]

> changing the size date (8 or 16 bit) - the other device does not respond to given commands

For testing SPI (and UART for that matter), it's always better to disconnect "other devices" and loop back Tx to Rx.

So, what is the expected SPI_DR content and what is the received content?

JW

[S.Ma]

Make sure there is no other part of the SW which reconfigure the GPIO after SPI init...

Also are the SPI2 and 3 same type (some like STM32F437 have high speed SPI1,4,5,6 (div2) and lower speed SPI2,3 (div4)

Are you using interrupts? When copy paste code, sometime not all is converted manually...

[MMa��]

I test Tx connect to Rx, SPI2 worked properly. The mistake was third device on SPI BUS. The third device was still active (CS).

Thank you for your advice