STM32L431 ADC+DAC noisy despite ADC samples are clean
Hi I’m trying to explore what I can do with 12 good bits.
I’m experimenting an output noise ,even in this simplified condition where the converted ADC value is directly sent to DAC
Analog and digital ground are separated and return current paths in PCB should be good
ADC is driven by op amp output + 20 ohm
ADC is triggered by a timer ,oversample 4 times ,the ADC values with Vin=½ VDDA varies between 2044 and 2046 chacking samples for ten seconds,saving max and min values) ,ADC sample and hold=24,5 clock cycles
DAC is used with no SampleHold,and with Buffer : DAC1->MCR=0;
DAC is triggered by the same timer interrupt related to ADC,only when ADC end of conversion flag is 1(once in 4).
The output value is obtained with DAC1->DHR12R1=global_adc_val;
Notice that in case DAC1->DHR12R1=2048; there is no noise.
Noise lowers if MCR->MODE1=0x2 instead of 0;
Why only 2 fluctuating bits on 4096 bits can cause an huge audible noise?And why excluding buffer makes it better?
Thanks
