STM32L412KB SPI1 3-wire slave mode – PA6 vs PA7 as SDIO
Hi,
I am configuring the STM32L412KB to operate as an SPI1 slave in 3-wire (1-line / half-duplex) mode.
I have configured the following pins:
- PA4 → SPI1_NSS
- PA5 → SPI1_SCK
- PA6 → SPI1_MISO / SDIO
With this configuration, the SPI communication works correctly.
However, in a previous support case with ST, I was advised to use PA7 as the SDIO pin. The information I received was:
“On SPI1, the single data line in 1-LINE (half-duplex) mode is the MOSI pin = PA7.”
According to the STM32L412KB datasheet, PA7 is indeed the SPI1_MOSI alternate-function pin, while PA6 is SPI1_MISO.
However, when I configure PA7 as the SDIO line, the communication does not work. It works correctly only when I use PA6 as the SDIO line.
Could someone clarify this behavior?
In particular, I would like to understand whether, in SPI1 slave + 1-line (half-duplex) mode, the bidirectional data line is actually expected to be connected to PA7 (MOSI), or whether PA6 (MISO) can/should be used in slave mode.
If there are any specific SPI register settings or GPIO configuration requirements that affect the choice of the SDIO pin, I would also appreciate any additional information.
Thanks in advance for your help.
