STM32L412 ADC clock source in synchronous clock mode

[Humbel-IMT]

I'm trying to figure out which clock source the STM32L412 ADC uses in synchronous mode. The documentation doesn't seem to be consistent.

Most diagrams show SYSCLK, while the text says HCLK (AHB clock).

It looks to me like RM0394 Figure 13 and DS12469 Figure 5 are incomplete because they don't show the AHB bus as an ADC clock input. Am I missing something, or is this a documentation error?
 

 

 

[Gyessine]

Hello ​@Humbel-IMT 

the STM32L41 and STM32L412 are a specific case among other STM32L4 products.

They have only one clock source for ADC, which is SYSCLK. However, all other STM32L4 products can have two clock sources: the system clock or the PLLSAI1 output.

For this reason, the note "(a)" above PLLSAI output in the reference manual states: "a. Except STM32L41xxx/42xxx devices."

In DS12469, which is specific to STM32L412 states SYSCLK.

It is hoped that this explanation answers the question.

BR
Gyessine

[Humbel-IMT]

Hi Gyessine,

Thx for the reply.

What bothers me about that section of the reference manual is that, in my opinion, it does not clearly explain the difference between synchronous and asynchronous mode. Furthermore, it refers to the "system clock" in the first sentence and later to the AHB clock, which is HCLK, not SYSCLK.

I assume the truth is closer to what ​@waclawek.jan is suggesting. What do you think?

[Gyessine]

Hello ​@Humbel-IMT 
I have escalated it internally for analysis and eventual fix.

Thank you for your contribution.
An internal ticket was submitted for further investigation. Internal ticket number: CDM0064435(This is an internal tracking number and is not accessible or usable by customers).
BR
Gyessine

[waclawek.jan]

I’d say, it’s in this way:

 

[Humbel-IMT]

That's exactly what I concluded from everything I've read so far. It would have been nice if the AHB bus had been routed or marked like the SYSCLK is for the DFSDM1. Just a text label would have been enough, no long lines needed.

Thx for the response 🙂