STM32L4+: Version register not described in Reference Manual

[Uwe Bonnes]

Posted on July 11, 2018 at 12:02

Hello,

in the L4+ series, DMA2D, OCTOSPI, SDMCC, SPI and USART have a Version register at offset 0x3F4 of the IP address space, as seen in the current header files. RM0432 Rev.3 does not mention and describe these registers. Having a register to read the version of an IP is quite helpfull. Please add the description in the reference manual.

[Khouloud GARSI]

Posted on July 11, 2018 at 16:45

Hello Uwe,

The Peripheral Version register is not supported by all peripherals. In order to keep consistency and avoid confusion, we preferred to remove the description of this register from the reference manuals.

As you said, you may find it in the header files.

Khouloud.