STM32L4 LPUART receiver tolerance

[PRuss]

I'm hoping this is a simple question. In the reference manual (RM0394 section 39.4.5), the tolerance of the LPUART receiver is specified in Table 204. For example, with BRR = 1024 and 9 bits/1 stop bit, the tolerance is given as 2.33%.

I've been assuming this means that all of the sources of baud rate error need to stack up so that the total is no more than +/- 2.33%. Is this understanding correct, as opposed to 2.33% total (+/- 1.165%)?

[TDK]

Yes, it means ±2.33%.