Question
STM32L151 Signals generator with time shift/delay
Posted on August 28, 2013 at 16:10
I've succeeded to generate the first and the second signal, by doing the follow manipulation.TIM4 (PWM Mode) generate 8MHz at D.C 50%, and set as master trigger to TIM3 so they can be synced together. TIM3 (PWM Mode) set to slave and runs at 4MHz at D.C 25% in order to generate the second signal (TIM3-1). but my problem is to generate the third signal (TIM3-2) that need to run on even cycles....how can I generate the third signal with shifting?many thanks for the help. #tim3 #stm32 #timers #pwm #tim4
Hi,
I'm trying to generate 3 signal using TIM3&TIM4.the first signal run at 8MHz, DutyCycle 50%, the second signal should run every odd cycles of the first signal and the third should run every even cycles of the first signal. (see the image below)
I've succeeded to generate the first and the second signal, by doing the follow manipulation.TIM4 (PWM Mode) generate 8MHz at D.C 50%, and set as master trigger to TIM3 so they can be synced together. TIM3 (PWM Mode) set to slave and runs at 4MHz at D.C 25% in order to generate the second signal (TIM3-1). but my problem is to generate the third signal (TIM3-2) that need to run on even cycles....how can I generate the third signal with shifting?many thanks for the help. #tim3 #stm32 #timers #pwm #tim4