STM32L010K8 TIM2_CH4 PWM can't go to PB1

[Kansio]

A'm using LL libraty. I need simple PWM output on PB1.

TIM2 init related to CH1 and PA5 work.

When I change setup to CH4 and PB1 pwm doesn't go to the pin.

Both PA and PB ar clocked.

Under debuger I checked MODER registers, AF_5 function is selected.

Working code:

//port clock enabled in GPIO init function

 LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_5, LL_GPIO_MODE_ALTERNATE);

 LL_GPIO_SetPinPull(GPIOA, LL_GPIO_PIN_5, LL_GPIO_PULL_DOWN);

 LL_GPIO_SetPinSpeed(GPIOA, LL_GPIO_PIN_5, LL_GPIO_SPEED_FREQ_HIGH);

 LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_5, LL_GPIO_AF_5);

   /* Peripheral clock enable */

 LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2);

 LL_TIM_SetPrescaler(TIM2, __LL_TIM_CALC_PSC(SystemCoreClock, 100000));

 LL_TIM_EnableARRPreload(TIM2);

 LL_TIM_SetAutoReload(TIM2, __LL_TIM_CALC_ARR(SystemCoreClock, LL_TIM_GetPrescaler(TIM2), 2000));

 LL_TIM_OC_SetMode(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_OCMODE_PWM1);

 LL_TIM_OC_SetCompareCH1(TIM2, (LL_TIM_GetAutoReload(TIM2) / 2));

 LL_TIM_OC_EnablePreload(TIM2, LL_TIM_CHANNEL_CH1);

 LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH1);

 LL_TIM_EnableCounter(TIM2);

 LL_TIM_GenerateEvent_UPDATE(TIM2);

And not working code:

//port clock enabled in GPIO init function

 LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_1, LL_GPIO_MODE_ALTERNATE);

 LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_1, LL_GPIO_PULL_DOWN);

 LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_1, LL_GPIO_SPEED_FREQ_HIGH);

 LL_GPIO_SetAFPin_0_7(GPIOB, LL_GPIO_PIN_1, LL_GPIO_AF_5);

   /* Peripheral clock enable */

 LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2);

 LL_TIM_SetPrescaler(TIM2, __LL_TIM_CALC_PSC(SystemCoreClock, 100000));

 LL_TIM_EnableARRPreload(TIM2);

 LL_TIM_SetAutoReload(TIM2, __LL_TIM_CALC_ARR(SystemCoreClock, LL_TIM_GetPrescaler(TIM2), 2000));

 LL_TIM_OC_SetMode(TIM2, LL_TIM_CHANNEL_CH4, LL_TIM_OCMODE_PWM1);

 LL_TIM_OC_SetCompareCH4(TIM2, (LL_TIM_GetAutoReload(TIM2) / 2));

 LL_TIM_OC_EnablePreload(TIM2, LL_TIM_CHANNEL_CH4);

 LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH4);

 LL_TIM_EnableCounter(TIM2);

 LL_TIM_GenerateEvent_UPDATE(TIM2);

The same unexpected error appears when I set CH3 on PB0.

Of couse I checked regular GPIO OUTPUT posibilities and PB1 work.

I checked errata sheet and there is no limitations about GPIO and TIMERS around PWM functions.

Any suggestion will be appreciated.

Regards

Mark

[Tesla DeLorean]

Are you sure they are even mapped there?

https://www.st.com/resource/en/datasheet/stm32l010k8.pdf

I see them on PB10 / PB11 AF2

[Kansio]

And on PB1 using AF5.

[TDK]

Link the document you're looking at. What you show is not reflected in the datasheet in Tesla's link.

[Kansio]

"Read the manual carefully" ;)

My first ST in which resizing FLASH in the same family so changes the properties of the CPU.

I have to byu K4 because I have dedicated pcb routed for K4.

Thanks a lot for support!

Regards

Mark

[Tesla DeLorean]

Unfortunately the pin mapping/muxing option offered by ST are frequently inconsistent, limiting, and frustrating.

For the CM0 parts particularly watch that the AF number aren't always consistent for a given peripheral

[waclawek.jan]

STM32 with model number ending with 0 are not one chip with different memory sizes, but they are several different chips of the same subfamily with less testing and restricted operating range. That's why they often don't have the same mix of peripherals, even if they have the same model number differing only in the suffix indicating memory size.

JW

[Bubbles]

Thank you @Community member​ this is excellent answer.

Especially in case of value line products, the memory size is what determines the product, not the package. So while STM32L010K4 is a cheaper alternative to the STM32L011K4, the STM32L010K8 is a cheaper alternative to the STM32L051K8.

[waclawek.jan]

Unfortunately, pinout consistency is not a hard rule for non-value-line (i.e. non-0-ending) models, either.

One notable group which emerged lately are the -P and -Q suffixed parts with SMPS. I personally see this as a serious failure in parts marking scheme.

Then there are individual exceptions like the 'F303xB/C vs. 'F303xD/E. Don't ask me how I know, it was a painful experience.

JW