STM32L Clock Issue

[arulprabhu]

Posted on January 24, 2013 at 08:24

Hi all,

STM32L processor does not start function with the PLL clock.

External Oscillator (HSE) = 8Mhz.

PLL clock source (PLLSRC) = HSE

PLL multiplication factor (PLLMUL)= 6.

PLL Division factor (PLLDIV)= 2.

SYSCLK source = PLLCLK

AHB Prescaler value=1

HCLK = SYSCLK

APB1 Prescaler value=1

PCLK1=HCLK

APB2 Prescaler value=1

PCLK2=HCLK

Can anyone find the problem in clock configuration.

Thanks

Arul

#pll #external-clock

[Tesla DeLorean]

Posted on January 25, 2013 at 04:06

Ok, but how are you actually programming it? The numbers don't look objectionable, perhaps it's your code. Does the HSE start?

[waclawek.jan]

Posted on January 25, 2013 at 08:35

> Does the HSE start?

In other words, confirm HSE is working by keeping PLL bypassed first.

Do you have a ready made development board, or is this a custom hardware?

JW

[arulprabhu]

Posted on January 25, 2013 at 08:59

Dear clive1,

Thanks for your reply, Now the problem is solved.

Reason: Oscillator capacitor component problem,It is working well when i replaced it.

Thanks

Arul

[arulprabhu]

Posted on January 25, 2013 at 09:01

Dear waclawek.jan,

Now it is working with the above clock configuration

Thanks

Arul

[arulprabhu]

Posted on January 25, 2013 at 09:05

Dear clive and jan,

I have also tested the HSI clock in custom hardware.

Without PLL configuration,the processor works well.

But when i use HSI with PLL configuration,the processor gets hanged.

This is my HSI clock configuration:

This is called at systeminit()

static void SetSysClockToHSI_PLL(void)

{

  __IO uint32_t StartUpCounter = 0, HSIStatus = 0;

 

  /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/    

  /* Enable HSI */

 

        

  RCC->CR |= ((uint32_t)RCC_CR_HSION);

 

  /* Wait till HSI is ready and if Time out is reached exit */

  do

  {

    HSIStatus = RCC->CR & RCC_CR_HSIRDY;

    StartUpCounter++;  

  } while((HSIStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));

  if ((RCC->CR & RCC_CR_HSIRDY) != RESET)

  {

    HSIStatus = (uint32_t)0x01;

  }

  else

  {

    HSIStatus = (uint32_t)0x00;

  }  

    

  if (HSIStatus == (uint32_t)0x01)

  {

    /* Enable 64-bit access */

    FLASH->ACR |= FLASH_ACR_ACC64;

    

    /* Enable Prefetch Buffer */

    FLASH->ACR |= FLASH_ACR_PRFTEN;    

    /* Flash 1 wait state */

    FLASH->ACR |= FLASH_ACR_LATENCY;

    /* Enable the PWR APB1 Clock */

    RCC->APB1ENR |= RCC_APB1ENR_PWREN;

 

    /* Select the Voltage Range 1 (1.8V) */

    PWR->CR = PWR_CR_VOS_0;

 

    /* Wait Until the Voltage Regulator is ready */

    while((PWR->CSR & PWR_CSR_VOSF) != RESET)

    {

    }     

      

    /* HCLK = SYSCLK */

    RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; //8Mhz //AHB

      

    /* PCLK2 = HCLK */

    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; // 4Mhz APB2

    

    /* PCLK1 = HCLK */

    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;  //8Mhz //APB1

        

        

    /* Select HSI as system clock source */

   // RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));

    //RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSI;    

    /* Wait till HSI is used as system clock source */

   // while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04)

   // {

   // }

                

         /*  PLL configuration */

    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL |

                                        RCC_CFGR_PLLDIV));

    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSI | RCC_CFGR_PLLMUL6 | RCC_CFGR_PLLDIV3);

    /* Enable PLL */

    RCC->CR |= RCC_CR_PLLON;

    /* Wait till PLL is ready */

    while((RCC->CR & RCC_CR_PLLRDY) == 0)

    {

    }

        

    /* Select PLL as system clock source */

    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));

    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;

    /* Wait till PLL is used as system clock source */

    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL)

    {

    }

        

        

        

  }

  else

  {

    /* If HSI fails to start-up, the application will have wrong clock

       configuration. User can add here some code to deal with this error */    

  }

}

 Can you find the problem ?

Thanks

Arul

[Amel NASRI]

Posted on February 20, 2013 at 14:42

Hi Arul,

You can compare your code with the one that you may generate using the System Clock Configuration tool.

ST.MCU

[waclawek.jan]

Posted on February 20, 2013 at 15:15

    /* Select PLL as system clock source */

    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));

    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;

This, after the &=, sets MSI as the clock source, until the |=. I am not sure such rapid switching of clock source is OK.

[EDIT] probably yes, as MSI is the default clock source until that moment anyway... [/EDIT]

JW