STM32H750B-DK ADC Sample
Hello there, I am making an osciloscope
I am using ADC with configuration like this
and I am triggering my ADC with 1ms TIM6 and sending this to PC where I display it
I am using 240Mhz CPU Clock and my clock configuration looks like this
Now everything works fine but the highest signal I can see is 955 Hz (which means my sample rate is probably 1.91 khz (955*2=1910 Hz)
Now I cannot figure out where this limitation comes from, I am using 240Mhz CPU clock and I am constantly triggering ADC with 1ms (I just want to know why is there this limitation, maybe if I use High speed timer, I could increase this, but thats not important right now)
I did figure out that if I increase CPU frequency (it was 72Mhz before and the highest signal I could see was even lower) that my sample rate also increases so sample rate is somehow related to CPU frequency
So why is my sample rate that low (I would expect it at least like 1Mhz or something (if I use 240Mhz CPU clock)
Thanks for Anwsering and Best Regards
