Hi everyone,I am working on an STM32H745 dual-core device.My current setup is:CM7 starts first after reset (default hardware behavior). CM7 performs minimal initialization and releases CM4. The bootloader runs on CM4. CM4 bootloader is located at 0x08100000. CM4 application is located at 0x08120000.The CM4 bootloader validates the application image and then jumps to the CM4 application using the standard vector table jump sequence.My goal is to support firmware updates of the CM4 application while the bootloader itself is running on CM4.I would like to understand the recommended architecture and any limitations for this scenario:What is the recommended way to organize flash banks when the CM4 bootloader needs to update the CM4 application? Is it safe for a CM4 bootloader executing from Bank 2 to erase/program another region in the same bank where the CM4 application resides? Should the bootloader be moved to a different flash bank or SRAM during the update process? Are there any STM32H745-specific constraints regarding flash programming from CM4? How do developers typically handle dual-core synchronization when CM4 owns the boot process and CM7 is kept in a waiting state? Are there any examples or application notes showing a CM4-based bootloader updating both CM4 and CM7 application images?Any guidance, reference projects, or application notes would be greatly appreciated.Thank you.

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Question

STM32H745 - Running Bootloader on CM4 and Updating CM4 Firmware

Hi everyone,

I am working on an STM32H745 dual-core device.

My current setup is:

The CM4 bootloader validates the application image and then jumps to the CM4 application using the standard vector table jump sequence.

My goal is to support firmware updates of the CM4 application while the bootloader itself is running on CM4.

I would like to understand the recommended architecture and any limitations for this scenario:

What is the recommended way to organize flash banks when the CM4 bootloader needs to update the CM4 application?
Is it safe for a CM4 bootloader executing from Bank 2 to erase/program another region in the same bank where the CM4 application resides?
Should the bootloader be moved to a different flash bank or SRAM during the update process?
Are there any STM32H745-specific constraints regarding flash programming from CM4?
How do developers typically handle dual-core synchronization when CM4 owns the boot process and CM7 is kept in a waiting state?
Are there any examples or application notes showing a CM4-based bootloader updating both CM4 and CM7 application images?

Any guidance, reference projects, or application notes would be greatly appreciated.

Thank you.