STM32H743 : SPI speed upto 150Mhz while Cube need to be updated?

[albert sun]

Posted on November 10, 2017 at 14:28

According to the the latest RM0433, the STM32H7 SPI can be run in both master and slave mode up to kernel frequency / 2. You are allowed (in the Cube) to set the SPI kernel clock to 400 MHz, so this suggests an absolute maximum of 200 MHz. According to the latest STM32H743xI datasheet (October 2017, rev3) Electrical Characteristics, Table 102, SPI dynamic characteristics, for SPI 1-3 in slave receiver mode with Vdd in the 1.62-3.6V range, the maximum rate is 150 MHz and in Master Transmit mode for Vdd in the 2.7 to 3.6 V range, the maximum rate is 133 MHz. However, the latest Cube raises an error if you try to specify a master mode output rate in excess of 50 MHz. Is this just the Cube being out of date (50 MHz is the maximum rate for the STM32F7 series)?

#stme32-cube #spi-bus #stm32h7

[Emmanuel COMBETTE DE RYMON]

Posted on December 05, 2017 at 12:27

Hello Albert,

I looked to your question please see my the answer below.

• The Data sheet provides the maximum limits of the MCK pin. This MCK freq value is SPI kernel clock/2 at maximum. So if SPI ken clk= 400Mhz, MCK could be in be generated at MCK=200 Mhz. But due to the GPIO characteristics, the MCK value should be as per data sheet lower values as in the table you have mentioned.

• When SP1 is master in reception, transmission or full duplex, maximum MCK frequency value is 133Mz. These frequencies are high, very few design are using this, the line capacitance has to be low on PCB.

• When SP1 is slave in reception only, the maximum frequency for MCK clock accepted is 150Mhz (For this SPI kernel clk freq must be >= 2x MCK freq).

• When SPI is slave in transmit mode or full duplex, the limitation of the frequency comes the minimum time between each bit setup on the output line. The MCK half-period has to be bigger than tv(So) (data output valid time in slave mode) => Fmax < 1 / [ 2 * Tv(So)] . if VDD=2.7V-3.6V, Tv(SO)=16ns=> Fmax = 31Mhz as per fSck max value in the table .

• Regarding cubeMx,Yes you are right , The max baudrate -ie the MCK clock frequency- of 50Mbits/s is wrong. CubeMx should allow the values in the DS “SPI dynamic characteristicsâ€� table.

I hope this will help you. Let me know if something is unclear.

Br,

Emmanuel

[Emmanuel COMBETTE DE RYMON]

Posted on December 14, 2017 at 13:20

Dear Albert,

Yes the STM32CubeMX is not aligned with the datasheet table102 you have mentioned above.

The development tool team is aware and should fix this limitation in the coming release.

Br,

Emmanuel

STMicroelectronics  T.O.M.A.S

- Technically Orientated Microcontroller Application Service

[albert sun]

Posted on December 14, 2017 at 15:20

Thanks a lot Emmanuel for your reply and follow up.

I am looking forward to a new update on the CubeMX soon.

Take the chance to wish you and all the ST team mates a Merry Christmas and happy new year!

best regards

Albert