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robertnoble9
Associate III
Apr 7, 2018 1:15 PM UTC
Solved

STM32H743 Nucleo DMA transfer error

Posted on April 07, 2018 at 15:15

Hi all,

To start with:

Board: STM32H743ZI Nucleo

IDE: Attolic TrueSTUDIO for STM32 9.0.0

HAL version: STM32Cube_FW_H7_V1.2.0

I'm trying to trigger a DMA transfer on DMA1_Stream7 using TIMER 3 CC3.  I want to trigger a transfer from a variable into the CCR for TIM3 channel 3.

I can initial the DMA stream to the configuration I think it should be in but as soon as the stream is enabled I get a transfer error and I can't work out what the problem is.

Any help would be great.

Thanks

Below is a screenshot of DMA1, stream 7 register values.

0690X0000060AH8QAM.png

Below is my DMA stream initialisation code:

void setUpDMA(TIM_HandleTypeDef *htim)

{

static DMA_HandleTypeDef hdma_tim;

/* Enable DMA clock */

__HAL_RCC_DMA1_CLK_ENABLE();

/* Set the parameters to be configured */

hdma_tim.Init.Request = DMA_REQUEST_TIM3_CH3;

hdma_tim.Init.Direction = DMA_MEMORY_TO_PERIPH;

hdma_tim.Init.PeriphInc = DMA_PINC_DISABLE;

hdma_tim.Init.MemInc = DMA_MINC_DISABLE;

hdma_tim.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;

hdma_tim.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;

hdma_tim.Init.Mode = DMA_CIRCULAR;

hdma_tim.Init.Priority = DMA_PRIORITY_HIGH;

hdma_tim.Init.FIFOMode = DMA_FIFOMODE_DISABLE;

hdma_tim.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;

hdma_tim.Init.MemBurst = DMA_MBURST_SINGLE;

hdma_tim.Init.PeriphBurst = DMA_PBURST_SINGLE;

/* Set hdma_tim instance */

hdma_tim.Instance = DMA1_Stream7;

/* Link hdma_tim to hdma[TIM_DMA_ID_CC3] (channel3) */

__HAL_LINKDMA(htim, hdma[TIM_DMA_ID_CC3], hdma_tim);

DMA1->LIFCR = 0xFFFF;

DMA1->HIFCR = 0xFFFF;

/* Initialize TIMx DMA handle */

HAL_DMA_Init(htim->hdma[TIM_DMA_ID_CC3]);

}

UPDATE:  SOLVED

As JW pointed out, the memory address of the variable I was trying to transfer was in TCM memory, which DMA1 and DMA2 do not have access to.  After adding __attribute__((section(''.sram_d2'')) to the definition of the variable, it was placed into SRAM in domain 2 (address 0x30000000),  this solved the problem (YAY).

    This topic has been closed for replies.
    waclawek.jan
    waclawek.janBest answer
    Super User
    Apr 9, 2018 7:08 PM UTC
    Posted on April 09, 2018 at 21:08

    The DTCM-RAM is available only to the processor and MDMA. Use other RAM (preferrably one of those in the D2 domain).

    JW

    2 replies

    waclawek.jan
    waclawek.janBest answer
    Super User
    Apr 9, 2018 7:08 PM UTC
    Posted on April 09, 2018 at 21:08

    The DTCM-RAM is available only to the processor and MDMA. Use other RAM (preferrably one of those in the D2 domain).

    JW

    Felipe Navarro
    Associate
    Apr 10, 2018 2:38 AM UTC
    Posted on April 10, 2018 at 04:38

    Take a look into this thread, at least for the ADC it helped with my problem:

    https://community.st.com/0D50X00009XkXEHSA3