STM32H743 Cortex-M7 core revision?

[OVela.1183]

Hi!

I was wondering which ARM Cortex-M7 revision does the STM32H743 uses.

Does all the H7 family use the same core rev?

Asking because we currently have a STM32F746 and we want to avoid de single stepping bug while debigging from the r0p0 and r0p1 core revisions.

I have checked on the reference manual RM0433 and the only reference that I can find is in page 3057 on the Access port identification register (AP_IDR) which tells me that it is at least r0p5 but I would like some confirmation.

Thank you very much!

[Uwe Bonnes]

You mix up F7 and H7. The single step bug only affects F7, F76 is I remember right. H743 has several revisions, with lots of differences, Check an actual datasheet and errata sheet!

[Tesla DeLorean]

r1p1

Topic covered here several times https://community.st.com/s/question/0D50X0000AnssYLSQY/how-can-i-check-the-revision-of-the-m7-core-without-checking-the-registers

[Tesla DeLorean]

>>Does all the H7 family use the same core rev?

ST tends to stick with a single IP in each design, probably relates to how it is licensed and paid for

CPUID 411FC271 DEVID 450 REVID 1001 Cortex M7 r1p1

CPUID 411FC271 DEVID 450 REVID 1003 Cortex M7 r1p1 STM32H7xx Rev Y

CPUID 411FC271 DEVID 450 REVID 2001 Cortex M7 r1p1 STM32H7xx Rev X

CPUID 411FC271 DEVID 450 REVID 2003 Cortex M7 r1p1 STM32H7xx Rev V

[Piranha]

STM32H7: AN4891 section 2.6.

STM32F7: AN4667 section 1.7.

SEGGER have implemented a workaround for this hardware core bug in their J-Link debuggers. On-board ST-LINK can be converted to J-Link OB.

https://www.segger.com/products/debug-probes/j-link/models/other-j-links/st-link-on-board/

[OVela.1183]

Thank you all for your answers!!

Next time I will make a more thorough search through the forum, but it appears I was not using the correct keywords and I did not know where to look!