STM32H735V (LQFP100) PC2_C and PC3_C speed

[heveskar]

Hello,

I have a problem with pins PC2_C and PC3_C on STM32H7. We have custom board based on this MCU and we want to interface SD card via SPI. We are using these pins: PA9 as SCK, PA0 as CS, PC2_C and PC3_C as MISO and MOSI respectively. I can not initialize the SD card to SPI mode and I think that the problem is caused by PC3_C pin. This MCU does not have PC2 and PC3 connected to external pads, so we must close the analog switch between PC2+PC2_C and PC3+PC3_C. This is done using SYSCFG_PMCR register. By my understanding, those switches are on this MCU closed by default, but I can close them either way using:

HAL_SYSCFG_AnalogSwitchConfig(SYSCFG_SWITCH_PC2, SYSCFG_SWITCH_PC2_CLOSE);
HAL_SYSCFG_AnalogSwitchConfig(SYSCFG_SWITCH_PC3, SYSCFG_SWITCH_PC3_CLOSE);

The switches close properly, as I can control those two pins manually. Now my problem is that on pin PC3_C - MOSI, the edges during SPI communication are so slow, that the SD card is not working.

I tried toggling the pins manually with pulse width around 1.4 us and curious thing is that while pin PC2_C is working well enough, PC3_C is so slow that its value does not even reach 3.3V, see picture:

You can see that PC2_C (blue one) has rise time about 100 ns, PC3_C (red one) has more than 1.3 us.

I tried setting pin speed to Very High using the OSPEED register, but it did not help much.

According to datasheet page 68, those two pins have structure TT_A instead of FT_A, but i did not find anywhere what that means for the output frequency (only details I could find is Figure 77 in the RM). In the table 57 on datasheet page 161 (Output timing characteristics), there I could not find anything about those particular pins. According to this table, rise time of all pins in Very High speed is around 3 ns, which pin PC3_C exceeds by few orders of magnitude.

I found that minimum impedance of the analog switch for 3.3 V VDD is probably 315 Ω (datasheet page 163), but I do not know if it is of any help. Weird is that most people in other threads have problems with pin PC2_C and PC3_C is good, whereas I have it other way round.

So, am I missing something and is there any other way to change output speed of the pins, or there is just physical limitation that the edge cannot be faster than that? If it is the latter, I think it should be mentioned somewhere in the documentation (I could not find it).

There are few similar questions, but neither has a solution:

https://community.st.com/s/question/0D50X0000AxFsTqSQK/stm32h743z-lqfp144-gpio-not-working-on-pc2c-and-pc3c

https://community.st.com/s/question/0D50X0000AaZDf0SQG/problem-with-tx-clk-for-mii-interface-analog-switch-between-pc3c-and-pc3

https://community.st.com/s/question/0D53W00000CRxrz/smt32f7-or-stm32h7-fmc-sdram-controller-config-documentation

Thanks for reply,

Karel

[Andreas Bolsch]

On Nucleo-H723ZG, Rev. Z, (PC2 and PC3 not bonded out as well), VDD 3.3V, both PC2_C and PC3_C look quite ok, taking into account a rather high output impedance of approx. 300 Ohms. From top to bottom: PA03, PC03_C and PC02_C, configured as push-pull output with pull-up enabled, all three open, only probes attached. SYSCFGEN set to 1 in RCC_C1_APB4ENR, SYSCFG_PMCR is 0x03000000 (PC3SO and PC2SO both 0)

One might check: VDDA around 3V (as the analog switches are powered by VDDA, not by VDD), all ADCs disabled so that they can't interfere.

If you still see this problem, the pin might have beed damaged. The Pxy_C pins are apparently quite delicate in contrast to other GPIO pins. Abs. max. rating is only 1mA for the Pxy_C pins. As the Pxy pin "behind" is much stronger, this rating must be due to the analog switch itself. And from the diagram in the RM it appears that there's no diode clamping to GND nor to VDD when the switch is open. An external protection for those pins is probably a good idea.

[heveskar]

Hi,

thanks for your support. It did not occur to me to try it on the Nucleo-H723ZG even though we have it here. So now I tried it as you did and I agree, that on this board this problem is not present.

I measured that we really have 3.3V on the VDDA pin. All of the pins VDD, VDDLDO, VBAT, VDD33USB and VDDA have 3.3V on them. VREF+ is not connected to VDDA but it should not be a problem, as we have set up VREFBUF as reference for the ADCs.

I tried disabling ADCs as you suggested (we had only ADC1 used), but with no success. I also tried another (newly assembled) board as you suggested that the pin could be damaged, but the problem persisted. We have ESDS314 protection diode on those pins.

Do you have any other idea what could cause this issue?

Thanks,

Karel

[Andreas Bolsch]

That's odd ... Apart from different package/bonding and part of configuration the H723 and H735 in question should be identical. The ESD314's capacitance can't be a problem. Nothing connected to PC3_3 except this diode and probe? The slow edges suggest a load in the range of 1nF. Decoupling capacitor accidentally connected? Otherwise I'm afraid I'm running out of ideas.

[Amel NASRI]

Hi @heveskar​ ,

Is alternate function configured properly?

According to the article FAQ: Default State of STM32H7 switches connecting Pxy_C and Pxy pads, the alternate functions are accessible through Pxy pin/ball.

-Amel

[heveskar]

Hi Amel,

for the testing, i had pins in GPIO digital mode and SPI is disabled. In the final application, SD card is interfaced through SPI, so those pins will have SPI alternate function enabled. This is correct, no? The edges are slow in both cases.

Thanks,

Karel

[Amel NASRI]

Hi @heveskar​ ,

Can you share the code of GPIO configuration when trying to use SPI?

-Amel

[heveskar]

Per our information directly from ST, this is a confirmed bug in sillicon and it will appear in an errata when they know exactly what causes the problem as they are not sure yet. They will fix the hardware only if they make new revision, which is not sure will happen.