STM32H7 TCM RAM access speed

[MMn.2]

Reference manual says that TCM RAMs are accessible at the maximum clock speed without any latency, but to perform accesses at a CPU speed higher than 520 MHz, one must disable the ECC on this RAM through the CPUFREQ_BOOST option byte. What happens if I clock MCU at 550Mhz without the CPUFREQ_BOOST byte set?

[Bruno_ST]

Hello @MMn.2​ 

This constraint is based on design freq limits and characterization (temperatures & Vdd range) of the STM32H7.

If you do that you may encounter some troubles, such as HardFault, NMI, BusLock,...

BR,

Bruno

[waclawek.jan]

Hi @Bruno_ST​ ,

What is the relationship between CPUFREQ_BOOST in FLASH_OPTSR2_x and CPU_FREQ_BOOST in SYSCFG_UR18, and why are they called differently (i.e. both can't be found with a simple text search)? Btw., DS mentions only CPU_FREQ_BOOST.

JW

[Bruno_ST]

Hello @Community member​ 

Thanks for reporting, yes it is same only CPU_FREQ_BOOST should be used (like DS)

Update of the doc RM0468 have been logged into our system.

BR,

Bruno

[waclawek.jan]

Hi @Bruno_ST​ ,

Thanks for the prompt reply.

so, is it correct to say, that FLASH_OPTSR2_x.CPU_FREQ_BOOST bit is copied upon reset by hardware into SYSCFG_UR18.CPU_FREQ_BOOST; and then in runtime, user can modify SYSCFG_UR18.CPU_FREQ_BOOST to enable/disable ECC for TCM?

JW

[Bruno_ST]

Hello @Community member​ 

Yes and no, i won't say that, SYSCFG_UR18.CPU_FREQ_BOOST is a readonly bit.

BR,

Bruno

[waclawek.jan]

Oh, indeed. Thanks for the explanation.

JW