STM32H7 Power down sequence

[Makoto]

About Power-Down Sequence (Device : STM32H7B0xB)

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Datasheet : DS13196 - Rev 6 Page 13

"During the power-down phase, VDD can temporarily become lower than other supplies only if the energy provided to the microcontroller remains below 1 mJ. "

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Could you please let me know what this description means?

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The basic requirements for power sequence are as follows​,

​"When VDD is below 1 V, other power supplies (VDDA, VDD33USB and VDD50USB) must remain below VDD +300 mV."​

I want to know the relationship between this basic requirement and "below 1mJ".

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​Is it an exception to the basic requirements?

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[waclawek.jan]

E=I*t=C*V

Consider a simple case, where there's only VDD and VDDA, VDD is the primary source, and VDDA is derived from it using a LDO which prevents reverse current flow, i.e. normally VDDA is lower than VDD by the LDO drop.

After switching off the primary power source, VDD starts to decrease, but if the load on VDDA is very small, the capacitors on VDDA may prevent VDDA from dropping quickly enough, and if VDD gets below VDDA, the internal structures in the chip start to behave like a diode and conduct current from VDDA to VDD.

The 1mJ requirement states, that in this case, the total energy which goes through those internal diode-like structures must stay below 1mJ. One way to interpret that is, that the current flowing in that way times the time it takes must stay below 1m A*s (i.e. 1mA*1s, or 10mA*100ms, etc.) Of course the current will change, so this is more an integral than just a plain multiplication.

Other way to look at it is, that if it's only the capacitors on VDDA which provide the reverse flow, then there's no more energy to be dissipated during that flow in the mcu than what's stored in those capacitors at the beginning of discharge. For example 3V on a 100nF capacitor represents 3V*100nF=300nJ.

JW

[Makoto]

@Community member​ 

Thank you for your comment.

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Now situation is

VDDA Drop : slow

VDD Drop : quick, temporarily VDD < VDDA - 300mV

(Max different is about 500mV, VDD+500mV = VDDA)

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So I think this situation is NOT met the requirement as following

​"When VDD is below 1 V, other power supplies (VDDA, VDD33USB and VDD50USB) must remain below VDD +300 mV."​ [Requirement 1]

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If we can confirm that it meets the following conditions, is it OK to assume that it meets the device specifications?

"During the power-down phase, VDD can temporarily become lower than other supplies only if the energy provided to the microcontroller remains below 1 mJ. " [Requirement 2]

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This means that requirement 1 is not met, but requirement 2 is met.

[waclawek.jan]

Probably yes, but note that I am not ST - this is a primarily user-driven forum with only casual ST presence. You may want to contact ST directly, through FAE or the web support form.

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JW​