STM32H7 example for 2 ADCs+DMA+TIMER

[PAkRad]

Hello all.

We have developed in the past some devices using the STM32F4 and F7 families, with no issues using ADC+DMA+Timer Triggering with no effort (mostly tweaking the examples provided by ST and using the ioc Cube files).

However, we are trying to do the same, but we are finding big issues with the H7 family, in specific when we use more than one ADC (to my knowledge this example is not provided by ST yet). There are also problems with the DMA (we have reader and moved the data buffers to RAM D2 area) and we do not see the triggering of the DMA interrupt with the Timer trigger.

Maybe somebody in the forum knows one repository or is able to share a simple example of this structure (if it is based on STM32Cubemx ioc file the better, since for it will be easier to add things).

Thank you in advance.

[TDK]

It should be straightforward to extend the example for 1 ADC to multiple ADCs. Mind the cache alignment and management.

https://github.com/STMicroelectronics/STM32CubeH7/blob/c94252df7cec24a8fef67b28933353476a1edd3c/Projects/NUCLEO-H743ZI/Examples/ADC/ADC_DMA_Transfer/Src/main.c

[Bowman32]

You can refer to ADC dual mode example provided in STM32CubeH7. Also, available via this path STM32Cube_FW_H7_V1.9.1\Projects\STM32H743I-EVAL\Examples\ADC\ADC_DualModeInterleaved

It can be modified to met your application requirements.

[PAkRad]

Hello and thank you for the answers.

The main difference I see between this code and the STM32 F7 is this part:

And then the multimode:

 

How are we able to set this up on an .ioc file?

In specific how is possible to set ADC master triggering the ADC slave  conversions?

Please, remember we are sampling two different channels on this two ADCs.

Thank you

[PAkRad]

Hello.

I wonder if it is possible to set this up on an STm32Cube ioc file?

How do we join both ADCs then?

[TDK]

You should be a little more specific in your needs. Specific chip, specific ADC setup (interleaved vs independent).

Yes, you can configure two ADCs in dual mode in IOC using the "Mode" option.

[PAkRad]

Hello,

we are using STM32H723VGT6 and we have tested many times using "Dual regular simultaneous mode only", the issue is if we do that the DMA interrupt is not triggered.

Has anybody tested this setup using IOC? Maybe it is a bug of the tool itself.

[PAkRad]

For example, @TDK​ , to clarify things this is what happens when you set Dual Regural simultaneous mode on the ioc file.

The ADC Slave cannot be setup in ADC_Software_trigger mode, as in the example you provided.

 

I am not so sure about this setup will work using ioc:

 

On the other hand, I have tried with different setups, like Independent ADCs (both triggered with Timer8_TRGO) with no success.

We are looking for an example working.

[TDK]

I don't have a ready made example for you. I imagine it's possible within an IOC. I would look at the ADC registers to try and determine the difference between what you want and what you're getting and use that information to guide what you change within the IOC file. I believe ADC_SOFTWARE_START is the correct selection for that field for the slave, as that's what is done in the dual mode CubeH7 example suggested above.

[PAkRad]

Thank you TDK.

The problem is that to set ADC_SOFTWARE_START you cannot select Dual Mode in the ADC2 with ioc.